0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * TQM 8540 Device Tree Source
0004 *
0005 * Copyright 2008 Freescale Semiconductor Inc.
0006 */
0007
0008 /dts-v1/;
0009
0010 / {
0011 model = "tqc,tqm8540";
0012 compatible = "tqc,tqm8540";
0013 #address-cells = <1>;
0014 #size-cells = <1>;
0015
0016 aliases {
0017 ethernet0 = &enet0;
0018 ethernet1 = &enet1;
0019 ethernet2 = &enet2;
0020 serial0 = &serial0;
0021 serial1 = &serial1;
0022 pci0 = &pci0;
0023 };
0024
0025 cpus {
0026 #address-cells = <1>;
0027 #size-cells = <0>;
0028
0029 PowerPC,8540@0 {
0030 device_type = "cpu";
0031 reg = <0>;
0032 d-cache-line-size = <32>;
0033 i-cache-line-size = <32>;
0034 d-cache-size = <32768>;
0035 i-cache-size = <32768>;
0036 timebase-frequency = <0>;
0037 bus-frequency = <0>;
0038 clock-frequency = <0>;
0039 next-level-cache = <&L2>;
0040 };
0041 };
0042
0043 memory {
0044 device_type = "memory";
0045 reg = <0x00000000 0x10000000>;
0046 };
0047
0048 soc@e0000000 {
0049 #address-cells = <1>;
0050 #size-cells = <1>;
0051 device_type = "soc";
0052 ranges = <0x0 0xe0000000 0x100000>;
0053 bus-frequency = <0>;
0054 compatible = "fsl,mpc8540-immr", "simple-bus";
0055
0056 ecm-law@0 {
0057 compatible = "fsl,ecm-law";
0058 reg = <0x0 0x1000>;
0059 fsl,num-laws = <8>;
0060 };
0061
0062 ecm@1000 {
0063 compatible = "fsl,mpc8540-ecm", "fsl,ecm";
0064 reg = <0x1000 0x1000>;
0065 interrupts = <17 2>;
0066 interrupt-parent = <&mpic>;
0067 };
0068
0069 memory-controller@2000 {
0070 compatible = "fsl,mpc8540-memory-controller";
0071 reg = <0x2000 0x1000>;
0072 interrupt-parent = <&mpic>;
0073 interrupts = <18 2>;
0074 };
0075
0076 L2: l2-cache-controller@20000 {
0077 compatible = "fsl,mpc8540-l2-cache-controller";
0078 reg = <0x20000 0x1000>;
0079 cache-line-size = <32>;
0080 cache-size = <0x40000>; // L2, 256K
0081 interrupt-parent = <&mpic>;
0082 interrupts = <16 2>;
0083 };
0084
0085 i2c@3000 {
0086 #address-cells = <1>;
0087 #size-cells = <0>;
0088 cell-index = <0>;
0089 compatible = "fsl-i2c";
0090 reg = <0x3000 0x100>;
0091 interrupts = <43 2>;
0092 interrupt-parent = <&mpic>;
0093 dfsrr;
0094
0095 dtt@48 {
0096 compatible = "national,lm75";
0097 reg = <0x48>;
0098 };
0099
0100 rtc@68 {
0101 compatible = "dallas,ds1337";
0102 reg = <0x68>;
0103 };
0104 };
0105
0106 dma@21300 {
0107 #address-cells = <1>;
0108 #size-cells = <1>;
0109 compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
0110 reg = <0x21300 0x4>;
0111 ranges = <0x0 0x21100 0x200>;
0112 cell-index = <0>;
0113 dma-channel@0 {
0114 compatible = "fsl,mpc8540-dma-channel",
0115 "fsl,eloplus-dma-channel";
0116 reg = <0x0 0x80>;
0117 cell-index = <0>;
0118 interrupt-parent = <&mpic>;
0119 interrupts = <20 2>;
0120 };
0121 dma-channel@80 {
0122 compatible = "fsl,mpc8540-dma-channel",
0123 "fsl,eloplus-dma-channel";
0124 reg = <0x80 0x80>;
0125 cell-index = <1>;
0126 interrupt-parent = <&mpic>;
0127 interrupts = <21 2>;
0128 };
0129 dma-channel@100 {
0130 compatible = "fsl,mpc8540-dma-channel",
0131 "fsl,eloplus-dma-channel";
0132 reg = <0x100 0x80>;
0133 cell-index = <2>;
0134 interrupt-parent = <&mpic>;
0135 interrupts = <22 2>;
0136 };
0137 dma-channel@180 {
0138 compatible = "fsl,mpc8540-dma-channel",
0139 "fsl,eloplus-dma-channel";
0140 reg = <0x180 0x80>;
0141 cell-index = <3>;
0142 interrupt-parent = <&mpic>;
0143 interrupts = <23 2>;
0144 };
0145 };
0146
0147 enet0: ethernet@24000 {
0148 #address-cells = <1>;
0149 #size-cells = <1>;
0150 cell-index = <0>;
0151 device_type = "network";
0152 model = "TSEC";
0153 compatible = "gianfar";
0154 reg = <0x24000 0x1000>;
0155 ranges = <0x0 0x24000 0x1000>;
0156 local-mac-address = [ 00 00 00 00 00 00 ];
0157 interrupts = <29 2 30 2 34 2>;
0158 interrupt-parent = <&mpic>;
0159 phy-handle = <&phy2>;
0160
0161 mdio@520 {
0162 #address-cells = <1>;
0163 #size-cells = <0>;
0164 compatible = "fsl,gianfar-mdio";
0165 reg = <0x520 0x20>;
0166
0167 phy1: ethernet-phy@1 {
0168 interrupt-parent = <&mpic>;
0169 interrupts = <8 1>;
0170 reg = <1>;
0171 };
0172 phy2: ethernet-phy@2 {
0173 interrupt-parent = <&mpic>;
0174 interrupts = <8 1>;
0175 reg = <2>;
0176 };
0177 phy3: ethernet-phy@3 {
0178 interrupt-parent = <&mpic>;
0179 interrupts = <8 1>;
0180 reg = <3>;
0181 };
0182 tbi0: tbi-phy@11 {
0183 reg = <0x11>;
0184 device_type = "tbi-phy";
0185 };
0186 };
0187 };
0188
0189 enet1: ethernet@25000 {
0190 #address-cells = <1>;
0191 #size-cells = <1>;
0192 cell-index = <1>;
0193 device_type = "network";
0194 model = "TSEC";
0195 compatible = "gianfar";
0196 reg = <0x25000 0x1000>;
0197 ranges = <0x0 0x25000 0x1000>;
0198 local-mac-address = [ 00 00 00 00 00 00 ];
0199 interrupts = <35 2 36 2 40 2>;
0200 interrupt-parent = <&mpic>;
0201 phy-handle = <&phy1>;
0202
0203 mdio@520 {
0204 #address-cells = <1>;
0205 #size-cells = <0>;
0206 compatible = "fsl,gianfar-tbi";
0207 reg = <0x520 0x20>;
0208
0209 tbi1: tbi-phy@11 {
0210 reg = <0x11>;
0211 device_type = "tbi-phy";
0212 };
0213 };
0214 };
0215
0216 enet2: ethernet@26000 {
0217 #address-cells = <1>;
0218 #size-cells = <1>;
0219 cell-index = <2>;
0220 device_type = "network";
0221 model = "FEC";
0222 compatible = "gianfar";
0223 reg = <0x26000 0x1000>;
0224 ranges = <0x0 0x26000 0x1000>;
0225 local-mac-address = [ 00 00 00 00 00 00 ];
0226 interrupts = <41 2>;
0227 interrupt-parent = <&mpic>;
0228 phy-handle = <&phy3>;
0229
0230 mdio@520 {
0231 #address-cells = <1>;
0232 #size-cells = <0>;
0233 compatible = "fsl,gianfar-tbi";
0234 reg = <0x520 0x20>;
0235
0236 tbi2: tbi-phy@11 {
0237 reg = <0x11>;
0238 device_type = "tbi-phy";
0239 };
0240 };
0241 };
0242
0243 serial0: serial@4500 {
0244 cell-index = <0>;
0245 device_type = "serial";
0246 compatible = "fsl,ns16550", "ns16550";
0247 reg = <0x4500 0x100>; // reg base, size
0248 clock-frequency = <0>; // should we fill in in uboot?
0249 interrupts = <42 2>;
0250 interrupt-parent = <&mpic>;
0251 };
0252
0253 serial1: serial@4600 {
0254 cell-index = <1>;
0255 device_type = "serial";
0256 compatible = "fsl,ns16550", "ns16550";
0257 reg = <0x4600 0x100>; // reg base, size
0258 clock-frequency = <0>; // should we fill in in uboot?
0259 interrupts = <42 2>;
0260 interrupt-parent = <&mpic>;
0261 };
0262
0263 mpic: pic@40000 {
0264 interrupt-controller;
0265 #address-cells = <0>;
0266 #interrupt-cells = <2>;
0267 reg = <0x40000 0x40000>;
0268 device_type = "open-pic";
0269 compatible = "chrp,open-pic";
0270 };
0271 };
0272
0273 localbus@e0005000 {
0274 #address-cells = <2>;
0275 #size-cells = <1>;
0276 compatible = "fsl,mpc8540-localbus", "fsl,pq3-localbus",
0277 "simple-bus";
0278 reg = <0xe0005000 0x1000>;
0279 interrupt-parent = <&mpic>;
0280 interrupts = <19 2>;
0281
0282 ranges = <0x0 0x0 0xfe000000 0x02000000>;
0283
0284 nor@0,0 {
0285 #address-cells = <1>;
0286 #size-cells = <1>;
0287 compatible = "cfi-flash";
0288 reg = <0x0 0x0 0x02000000>;
0289 bank-width = <4>;
0290 device-width = <2>;
0291 partition@0 {
0292 label = "kernel";
0293 reg = <0x00000000 0x00180000>;
0294 };
0295 partition@180000 {
0296 label = "root";
0297 reg = <0x00180000 0x01dc0000>;
0298 };
0299 partition@1f40000 {
0300 label = "env1";
0301 reg = <0x01f40000 0x00040000>;
0302 };
0303 partition@1f80000 {
0304 label = "env2";
0305 reg = <0x01f80000 0x00040000>;
0306 };
0307 partition@1fc0000 {
0308 label = "u-boot";
0309 reg = <0x01fc0000 0x00040000>;
0310 read-only;
0311 };
0312 };
0313 };
0314
0315 pci0: pci@e0008000 {
0316 #interrupt-cells = <1>;
0317 #size-cells = <2>;
0318 #address-cells = <3>;
0319 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
0320 device_type = "pci";
0321 reg = <0xe0008000 0x1000>;
0322 clock-frequency = <66666666>;
0323 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0324 interrupt-map = <
0325 /* IDSEL 28 */
0326 0xe000 0 0 1 &mpic 2 1
0327 0xe000 0 0 2 &mpic 3 1
0328 0xe000 0 0 3 &mpic 6 1
0329 0xe000 0 0 4 &mpic 5 1
0330
0331 /* IDSEL 11 */
0332 0x5800 0 0 1 &mpic 6 1
0333 0x5800 0 0 2 &mpic 5 1
0334 >;
0335
0336 interrupt-parent = <&mpic>;
0337 interrupts = <24 2>;
0338 bus-range = <0 0>;
0339 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
0340 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
0341 };
0342 };
