0001 /*
0002 * Device Tree Source for IBM/AMCC Taishan
0003 *
0004 * Copyright 2007 IBM Corp.
0005 * Hugh Blemings <hugh@au.ibm.com> based off code by
0006 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
0007 *
0008 * This file is licensed under the terms of the GNU General Public
0009 * License version 2. This program is licensed "as is" without
0010 * any warranty of any kind, whether express or implied.
0011 */
0012
0013 /dts-v1/;
0014
0015 / {
0016 #address-cells = <2>;
0017 #size-cells = <1>;
0018 model = "amcc,taishan";
0019 compatible = "amcc,taishan";
0020 dcr-parent = <&{/cpus/cpu@0}>;
0021
0022 aliases {
0023 ethernet0 = &EMAC2;
0024 ethernet1 = &EMAC3;
0025 serial0 = &UART0;
0026 serial1 = &UART1;
0027 };
0028
0029 cpus {
0030 #address-cells = <1>;
0031 #size-cells = <0>;
0032
0033 cpu@0 {
0034 device_type = "cpu";
0035 model = "PowerPC,440GX";
0036 reg = <0x00000000>;
0037 clock-frequency = <800000000>; // 800MHz
0038 timebase-frequency = <0>; // Filled in by zImage
0039 i-cache-line-size = <50>;
0040 d-cache-line-size = <50>;
0041 i-cache-size = <32768>; /* 32 kB */
0042 d-cache-size = <32768>; /* 32 kB */
0043 dcr-controller;
0044 dcr-access-method = "native";
0045 };
0046 };
0047
0048 memory {
0049 device_type = "memory";
0050 reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
0051 };
0052
0053
0054 UICB0: interrupt-controller-base {
0055 compatible = "ibm,uic-440gx", "ibm,uic";
0056 interrupt-controller;
0057 cell-index = <3>;
0058 dcr-reg = <0x200 0x009>;
0059 #address-cells = <0>;
0060 #size-cells = <0>;
0061 #interrupt-cells = <2>;
0062 };
0063
0064
0065 UIC0: interrupt-controller0 {
0066 compatible = "ibm,uic-440gx", "ibm,uic";
0067 interrupt-controller;
0068 cell-index = <0>;
0069 dcr-reg = <0x0c0 0x009>;
0070 #address-cells = <0>;
0071 #size-cells = <0>;
0072 #interrupt-cells = <2>;
0073 interrupts = <0x1 0x4 0x0 0x4>; /* cascade - first non-critical */
0074 interrupt-parent = <&UICB0>;
0075
0076 };
0077
0078 UIC1: interrupt-controller1 {
0079 compatible = "ibm,uic-440gx", "ibm,uic";
0080 interrupt-controller;
0081 cell-index = <1>;
0082 dcr-reg = <0x0d0 0x009>;
0083 #address-cells = <0>;
0084 #size-cells = <0>;
0085 #interrupt-cells = <2>;
0086 interrupts = <0x3 0x4 0x2 0x4>; /* cascade */
0087 interrupt-parent = <&UICB0>;
0088 };
0089
0090 UIC2: interrupt-controller2 {
0091 compatible = "ibm,uic-440gx", "ibm,uic";
0092 interrupt-controller;
0093 cell-index = <2>; /* was 1 */
0094 dcr-reg = <0x210 0x009>;
0095 #address-cells = <0>;
0096 #size-cells = <0>;
0097 #interrupt-cells = <2>;
0098 interrupts = <0x5 0x4 0x4 0x4>; /* cascade */
0099 interrupt-parent = <&UICB0>;
0100 };
0101
0102
0103 CPC0: cpc {
0104 compatible = "ibm,cpc-440gp";
0105 dcr-reg = <0x0b0 0x003 0x0e0 0x010>;
0106 // FIXME: anything else?
0107 };
0108
0109 L2C0: l2c {
0110 compatible = "ibm,l2-cache-440gx", "ibm,l2-cache";
0111 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
0112 0x030 0x008>; /* L2 cache DCR's */
0113 cache-line-size = <32>; /* 32 bytes */
0114 cache-size = <262144>; /* L2, 256K */
0115 interrupt-parent = <&UIC2>;
0116 interrupts = <0x17 0x1>;
0117 };
0118
0119 plb {
0120 compatible = "ibm,plb-440gx", "ibm,plb4";
0121 #address-cells = <2>;
0122 #size-cells = <1>;
0123 ranges;
0124 clock-frequency = <160000000>; // 160MHz
0125
0126 SDRAM0: memory-controller {
0127 compatible = "ibm,sdram-440gp";
0128 dcr-reg = <0x010 0x002>;
0129 // FIXME: anything else?
0130 };
0131
0132 SRAM0: sram {
0133 compatible = "ibm,sram-440gp";
0134 dcr-reg = <0x020 0x008 0x00a 0x001>;
0135 };
0136
0137 DMA0: dma {
0138 // FIXME: ???
0139 compatible = "ibm,dma-440gp";
0140 dcr-reg = <0x100 0x027>;
0141 };
0142
0143 MAL0: mcmal {
0144 compatible = "ibm,mcmal-440gx", "ibm,mcmal2";
0145 dcr-reg = <0x180 0x062>;
0146 num-tx-chans = <4>;
0147 num-rx-chans = <4>;
0148 interrupt-parent = <&MAL0>;
0149 interrupts = <0x0 0x1 0x2 0x3 0x4>;
0150 #interrupt-cells = <1>;
0151 #address-cells = <0>;
0152 #size-cells = <0>;
0153 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
0154 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
0155 /*SERR*/ 0x2 &UIC1 0x0 0x4
0156 /*TXDE*/ 0x3 &UIC1 0x1 0x4
0157 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
0158 interrupt-map-mask = <0xffffffff>;
0159 };
0160
0161 POB0: opb {
0162 compatible = "ibm,opb-440gx", "ibm,opb";
0163 #address-cells = <1>;
0164 #size-cells = <1>;
0165 /* Wish there was a nicer way of specifying a full 32-bit
0166 range */
0167 ranges = <0x00000000 0x00000001 0x00000000 0x80000000
0168 0x80000000 0x00000001 0x80000000 0x80000000>;
0169 dcr-reg = <0x090 0x00b>;
0170 interrupt-parent = <&UIC1>;
0171 interrupts = <0x7 0x4>;
0172 clock-frequency = <80000000>; // 80MHz
0173
0174
0175 EBC0: ebc {
0176 compatible = "ibm,ebc-440gx", "ibm,ebc";
0177 dcr-reg = <0x012 0x002>;
0178 #address-cells = <2>;
0179 #size-cells = <1>;
0180 clock-frequency = <80000000>; // 80MHz
0181
0182 /* ranges property is supplied by zImage
0183 * based on firmware's configuration of the
0184 * EBC bridge */
0185
0186 interrupts = <0x5 0x4>;
0187 interrupt-parent = <&UIC1>;
0188
0189 nor_flash@0,0 {
0190 compatible = "cfi-flash";
0191 bank-width = <4>;
0192 device-width = <2>;
0193 reg = <0x0 0x0 0x4000000>;
0194 #address-cells = <1>;
0195 #size-cells = <1>;
0196 partition@0 {
0197 label = "kernel";
0198 reg = <0x0 0x180000>;
0199 };
0200 partition@180000 {
0201 label = "root";
0202 reg = <0x180000 0x200000>;
0203 };
0204 partition@380000 {
0205 label = "user";
0206 reg = <0x380000 0x3bc0000>;
0207 };
0208 partition@3f40000 {
0209 label = "env";
0210 reg = <0x3f40000 0x80000>;
0211 };
0212 partition@3fc0000 {
0213 label = "u-boot";
0214 reg = <0x3fc0000 0x40000>;
0215 };
0216 };
0217 };
0218
0219
0220
0221 UART0: serial@40000200 {
0222 device_type = "serial";
0223 compatible = "ns16550";
0224 reg = <0x40000200 0x00000008>;
0225 virtual-reg = <0xe0000200>;
0226 clock-frequency = <11059200>;
0227 current-speed = <115200>; /* 115200 */
0228 interrupt-parent = <&UIC0>;
0229 interrupts = <0x0 0x4>;
0230 };
0231
0232 UART1: serial@40000300 {
0233 device_type = "serial";
0234 compatible = "ns16550";
0235 reg = <0x40000300 0x00000008>;
0236 virtual-reg = <0xe0000300>;
0237 clock-frequency = <11059200>;
0238 current-speed = <115200>; /* 115200 */
0239 interrupt-parent = <&UIC0>;
0240 interrupts = <0x1 0x4>;
0241 };
0242
0243 IIC0: i2c@40000400 {
0244 /* FIXME */
0245 compatible = "ibm,iic-440gp", "ibm,iic";
0246 reg = <0x40000400 0x00000014>;
0247 interrupt-parent = <&UIC0>;
0248 interrupts = <0x2 0x4>;
0249 };
0250 IIC1: i2c@40000500 {
0251 /* FIXME */
0252 compatible = "ibm,iic-440gp", "ibm,iic";
0253 reg = <0x40000500 0x00000014>;
0254 interrupt-parent = <&UIC0>;
0255 interrupts = <0x3 0x4>;
0256 };
0257
0258 GPIO0: gpio@40000700 {
0259 /* FIXME */
0260 compatible = "ibm,gpio-440gp";
0261 reg = <0x40000700 0x00000020>;
0262 };
0263
0264 ZMII0: emac-zmii@40000780 {
0265 compatible = "ibm,zmii-440gx", "ibm,zmii";
0266 reg = <0x40000780 0x0000000c>;
0267 };
0268
0269 RGMII0: emac-rgmii@40000790 {
0270 compatible = "ibm,rgmii";
0271 reg = <0x40000790 0x00000008>;
0272 };
0273
0274 TAH0: emac-tah@40000b50 {
0275 compatible = "ibm,tah-440gx", "ibm,tah";
0276 reg = <0x40000b50 0x00000030>;
0277 };
0278
0279 TAH1: emac-tah@40000d50 {
0280 compatible = "ibm,tah-440gx", "ibm,tah";
0281 reg = <0x40000d50 0x00000030>;
0282 };
0283
0284 EMAC0: ethernet@40000800 {
0285 unused = <0x1>;
0286 device_type = "network";
0287 compatible = "ibm,emac-440gx", "ibm,emac4";
0288 interrupt-parent = <&UIC1>;
0289 interrupts = <0x1c 0x4 0x1d 0x4>;
0290 reg = <0x40000800 0x00000074>;
0291 local-mac-address = [000000000000]; // Filled in by zImage
0292 mal-device = <&MAL0>;
0293 mal-tx-channel = <0>;
0294 mal-rx-channel = <0>;
0295 cell-index = <0>;
0296 max-frame-size = <1500>;
0297 rx-fifo-size = <4096>;
0298 tx-fifo-size = <2048>;
0299 phy-mode = "rmii";
0300 phy-map = <0x00000001>;
0301 zmii-device = <&ZMII0>;
0302 zmii-channel = <0>;
0303 };
0304 EMAC1: ethernet@40000900 {
0305 unused = <0x1>;
0306 device_type = "network";
0307 compatible = "ibm,emac-440gx", "ibm,emac4";
0308 interrupt-parent = <&UIC1>;
0309 interrupts = <0x1e 0x4 0x1f 0x4>;
0310 reg = <0x40000900 0x00000074>;
0311 local-mac-address = [000000000000]; // Filled in by zImage
0312 mal-device = <&MAL0>;
0313 mal-tx-channel = <1>;
0314 mal-rx-channel = <1>;
0315 cell-index = <1>;
0316 max-frame-size = <1500>;
0317 rx-fifo-size = <4096>;
0318 tx-fifo-size = <2048>;
0319 phy-mode = "rmii";
0320 phy-map = <0x00000001>;
0321 zmii-device = <&ZMII0>;
0322 zmii-channel = <1>;
0323 };
0324
0325 EMAC2: ethernet@40000c00 {
0326 device_type = "network";
0327 compatible = "ibm,emac-440gx", "ibm,emac4";
0328 interrupt-parent = <&UIC2>;
0329 interrupts = <0x0 0x4 0x1 0x4>;
0330 reg = <0x40000c00 0x00000074>;
0331 local-mac-address = [000000000000]; // Filled in by zImage
0332 mal-device = <&MAL0>;
0333 mal-tx-channel = <2>;
0334 mal-rx-channel = <2>;
0335 cell-index = <2>;
0336 max-frame-size = <9000>;
0337 rx-fifo-size = <4096>;
0338 tx-fifo-size = <2048>;
0339 phy-mode = "rgmii";
0340 phy-address = <1>;
0341 rgmii-device = <&RGMII0>;
0342 rgmii-channel = <0>;
0343 zmii-device = <&ZMII0>;
0344 zmii-channel = <2>;
0345 tah-device = <&TAH0>;
0346 tah-channel = <0>;
0347 };
0348
0349 EMAC3: ethernet@40000e00 {
0350 device_type = "network";
0351 compatible = "ibm,emac-440gx", "ibm,emac4";
0352 interrupt-parent = <&UIC2>;
0353 interrupts = <0x2 0x4 0x3 0x4>;
0354 reg = <0x40000e00 0x00000074>;
0355 local-mac-address = [000000000000]; // Filled in by zImage
0356 mal-device = <&MAL0>;
0357 mal-tx-channel = <3>;
0358 mal-rx-channel = <3>;
0359 cell-index = <3>;
0360 max-frame-size = <9000>;
0361 rx-fifo-size = <4096>;
0362 tx-fifo-size = <2048>;
0363 phy-mode = "rgmii";
0364 phy-address = <3>;
0365 rgmii-device = <&RGMII0>;
0366 rgmii-channel = <1>;
0367 zmii-device = <&ZMII0>;
0368 zmii-channel = <3>;
0369 tah-device = <&TAH1>;
0370 tah-channel = <0>;
0371 };
0372
0373
0374 GPT0: gpt@40000a00 {
0375 /* FIXME */
0376 reg = <0x40000a00 0x000000d4>;
0377 interrupt-parent = <&UIC0>;
0378 interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>;
0379 };
0380
0381 };
0382
0383 PCIX0: pci@20ec00000 {
0384 device_type = "pci";
0385 #interrupt-cells = <1>;
0386 #size-cells = <2>;
0387 #address-cells = <3>;
0388 compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
0389 primary;
0390 large-inbound-windows;
0391 enable-msi-hole;
0392 reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */
0393 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
0394 0x00000002 0x0ed00000 0x00000004 /* Special cycles */
0395 0x00000002 0x0ec80000 0x00000100 /* Internal registers */
0396 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */
0397
0398 /* Outbound ranges, one memory and one IO,
0399 * later cannot be changed
0400 */
0401 ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000
0402 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>;
0403
0404 /* Inbound 2GB range starting at 0 */
0405 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
0406
0407 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0408 interrupt-map = <
0409 /* IDSEL 1 */
0410 0x800 0x0 0x0 0x1 &UIC0 0x17 0x8
0411 0x800 0x0 0x0 0x2 &UIC0 0x18 0x8
0412 0x800 0x0 0x0 0x3 &UIC0 0x19 0x8
0413 0x800 0x0 0x0 0x4 &UIC0 0x1a 0x8
0414
0415 /* IDSEL 2 */
0416 0x1000 0x0 0x0 0x1 &UIC0 0x18 0x8
0417 0x1000 0x0 0x0 0x2 &UIC0 0x19 0x8
0418 0x1000 0x0 0x0 0x3 &UIC0 0x1a 0x8
0419 0x1000 0x0 0x0 0x4 &UIC0 0x17 0x8
0420 >;
0421 };
0422 };
0423
0424 chosen {
0425 stdout-path = "/plb/opb/serial@40000300";
0426 };
0427 };
