0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * STX GP3 - 8560 ADS Device Tree Source
0004 *
0005 * Copyright 2008 Freescale Semiconductor Inc.
0006 */
0007
0008 /dts-v1/;
0009
0010 / {
0011 model = "stx,gp3";
0012 compatible = "stx,gp3-8560", "stx,gp3";
0013 #address-cells = <1>;
0014 #size-cells = <1>;
0015
0016 aliases {
0017 ethernet0 = &enet0;
0018 ethernet1 = &enet1;
0019 serial0 = &serial0;
0020 pci0 = &pci0;
0021 };
0022
0023 cpus {
0024 #address-cells = <1>;
0025 #size-cells = <0>;
0026
0027 PowerPC,8560@0 {
0028 device_type = "cpu";
0029 reg = <0>;
0030 d-cache-line-size = <32>;
0031 i-cache-line-size = <32>;
0032 d-cache-size = <32768>;
0033 i-cache-size = <32768>;
0034 timebase-frequency = <0>;
0035 bus-frequency = <0>;
0036 clock-frequency = <0>;
0037 next-level-cache = <&L2>;
0038 };
0039 };
0040
0041 memory {
0042 device_type = "memory";
0043 reg = <0x00000000 0x10000000>;
0044 };
0045
0046 soc@fdf00000 {
0047 #address-cells = <1>;
0048 #size-cells = <1>;
0049 device_type = "soc";
0050 ranges = <0 0xfdf00000 0x100000>;
0051 bus-frequency = <0>;
0052 compatible = "fsl,mpc8560-immr", "simple-bus";
0053
0054 ecm-law@0 {
0055 compatible = "fsl,ecm-law";
0056 reg = <0x0 0x1000>;
0057 fsl,num-laws = <8>;
0058 };
0059
0060 ecm@1000 {
0061 compatible = "fsl,mpc8560-ecm", "fsl,ecm";
0062 reg = <0x1000 0x1000>;
0063 interrupts = <17 2>;
0064 interrupt-parent = <&mpic>;
0065 };
0066
0067 memory-controller@2000 {
0068 compatible = "fsl,mpc8540-memory-controller";
0069 reg = <0x2000 0x1000>;
0070 interrupt-parent = <&mpic>;
0071 interrupts = <18 2>;
0072 };
0073
0074 L2: l2-cache-controller@20000 {
0075 compatible = "fsl,mpc8540-l2-cache-controller";
0076 reg = <0x20000 0x1000>;
0077 cache-line-size = <32>;
0078 cache-size = <0x40000>; // L2, 256K
0079 interrupt-parent = <&mpic>;
0080 interrupts = <16 2>;
0081 };
0082
0083 i2c@3000 {
0084 #address-cells = <1>;
0085 #size-cells = <0>;
0086 cell-index = <0>;
0087 compatible = "fsl-i2c";
0088 reg = <0x3000 0x100>;
0089 interrupts = <43 2>;
0090 interrupt-parent = <&mpic>;
0091 dfsrr;
0092 };
0093
0094 dma@21300 {
0095 #address-cells = <1>;
0096 #size-cells = <1>;
0097 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
0098 reg = <0x21300 0x4>;
0099 ranges = <0x0 0x21100 0x200>;
0100 cell-index = <0>;
0101 dma-channel@0 {
0102 compatible = "fsl,mpc8560-dma-channel",
0103 "fsl,eloplus-dma-channel";
0104 reg = <0x0 0x80>;
0105 cell-index = <0>;
0106 interrupt-parent = <&mpic>;
0107 interrupts = <20 2>;
0108 };
0109 dma-channel@80 {
0110 compatible = "fsl,mpc8560-dma-channel",
0111 "fsl,eloplus-dma-channel";
0112 reg = <0x80 0x80>;
0113 cell-index = <1>;
0114 interrupt-parent = <&mpic>;
0115 interrupts = <21 2>;
0116 };
0117 dma-channel@100 {
0118 compatible = "fsl,mpc8560-dma-channel",
0119 "fsl,eloplus-dma-channel";
0120 reg = <0x100 0x80>;
0121 cell-index = <2>;
0122 interrupt-parent = <&mpic>;
0123 interrupts = <22 2>;
0124 };
0125 dma-channel@180 {
0126 compatible = "fsl,mpc8560-dma-channel",
0127 "fsl,eloplus-dma-channel";
0128 reg = <0x180 0x80>;
0129 cell-index = <3>;
0130 interrupt-parent = <&mpic>;
0131 interrupts = <23 2>;
0132 };
0133 };
0134
0135 enet0: ethernet@24000 {
0136 #address-cells = <1>;
0137 #size-cells = <1>;
0138 cell-index = <0>;
0139 device_type = "network";
0140 model = "TSEC";
0141 compatible = "gianfar";
0142 reg = <0x24000 0x1000>;
0143 ranges = <0x0 0x24000 0x1000>;
0144 local-mac-address = [ 00 00 00 00 00 00 ];
0145 interrupts = <29 2 30 2 34 2>;
0146 interrupt-parent = <&mpic>;
0147 tbi-handle = <&tbi0>;
0148 phy-handle = <&phy2>;
0149
0150 mdio@520 {
0151 #address-cells = <1>;
0152 #size-cells = <0>;
0153 compatible = "fsl,gianfar-mdio";
0154 reg = <0x520 0x20>;
0155
0156 phy2: ethernet-phy@2 {
0157 interrupt-parent = <&mpic>;
0158 interrupts = <5 4>;
0159 reg = <2>;
0160 };
0161 phy4: ethernet-phy@4 {
0162 interrupt-parent = <&mpic>;
0163 interrupts = <5 4>;
0164 reg = <4>;
0165 };
0166 tbi0: tbi-phy@11 {
0167 reg = <0x11>;
0168 device_type = "tbi-phy";
0169 };
0170 };
0171 };
0172
0173 enet1: ethernet@25000 {
0174 #address-cells = <1>;
0175 #size-cells = <1>;
0176 cell-index = <1>;
0177 device_type = "network";
0178 model = "TSEC";
0179 compatible = "gianfar";
0180 reg = <0x25000 0x1000>;
0181 ranges = <0x0 0x25000 0x1000>;
0182 local-mac-address = [ 00 00 00 00 00 00 ];
0183 interrupts = <35 2 36 2 40 2>;
0184 interrupt-parent = <&mpic>;
0185 tbi-handle = <&tbi1>;
0186 phy-handle = <&phy4>;
0187
0188 mdio@520 {
0189 #address-cells = <1>;
0190 #size-cells = <0>;
0191 compatible = "fsl,gianfar-tbi";
0192 reg = <0x520 0x20>;
0193
0194 tbi1: tbi-phy@11 {
0195 reg = <0x11>;
0196 device_type = "tbi-phy";
0197 };
0198 };
0199 };
0200
0201 mpic: pic@40000 {
0202 interrupt-controller;
0203 #address-cells = <0>;
0204 #interrupt-cells = <2>;
0205 reg = <0x40000 0x40000>;
0206 compatible = "chrp,open-pic";
0207 device_type = "open-pic";
0208 };
0209
0210 cpm@919c0 {
0211 #address-cells = <1>;
0212 #size-cells = <1>;
0213 compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
0214 reg = <0x919c0 0x30>;
0215 ranges;
0216
0217 muram@80000 {
0218 #address-cells = <1>;
0219 #size-cells = <1>;
0220 ranges = <0 0x80000 0x10000>;
0221
0222 data@0 {
0223 compatible = "fsl,cpm-muram-data";
0224 reg = <0 0x4000 0x9000 0x2000>;
0225 };
0226 };
0227
0228 brg@919f0 {
0229 compatible = "fsl,mpc8560-brg",
0230 "fsl,cpm2-brg",
0231 "fsl,cpm-brg";
0232 reg = <0x919f0 0x10 0x915f0 0x10>;
0233 clock-frequency = <0>;
0234 };
0235
0236 cpmpic: pic@90c00 {
0237 interrupt-controller;
0238 #address-cells = <0>;
0239 #interrupt-cells = <2>;
0240 interrupts = <46 2>;
0241 interrupt-parent = <&mpic>;
0242 reg = <0x90c00 0x80>;
0243 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
0244 };
0245
0246 serial0: serial@91a20 {
0247 device_type = "serial";
0248 compatible = "fsl,mpc8560-scc-uart",
0249 "fsl,cpm2-scc-uart";
0250 reg = <0x91a20 0x20 0x88100 0x100>;
0251 fsl,cpm-brg = <2>;
0252 fsl,cpm-command = <0x4a00000>;
0253 interrupts = <41 8>;
0254 interrupt-parent = <&cpmpic>;
0255 };
0256 };
0257 };
0258
0259 pci0: pci@fdf08000 {
0260 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0261 interrupt-map = <
0262
0263 /* IDSEL 0x0c */
0264 0x6000 0 0 1 &mpic 1 1
0265 0x6000 0 0 2 &mpic 2 1
0266 0x6000 0 0 3 &mpic 3 1
0267 0x6000 0 0 4 &mpic 4 1
0268
0269 /* IDSEL 0x0d */
0270 0x6800 0 0 1 &mpic 4 1
0271 0x6800 0 0 2 &mpic 1 1
0272 0x6800 0 0 3 &mpic 2 1
0273 0x6800 0 0 4 &mpic 3 1
0274
0275 /* IDSEL 0x0e */
0276 0x7000 0 0 1 &mpic 3 1
0277 0x7000 0 0 2 &mpic 4 1
0278 0x7000 0 0 3 &mpic 1 1
0279 0x7000 0 0 4 &mpic 2 1
0280
0281 /* IDSEL 0x0f */
0282 0x7800 0 0 1 &mpic 2 1
0283 0x7800 0 0 2 &mpic 3 1
0284 0x7800 0 0 3 &mpic 4 1
0285 0x7800 0 0 4 &mpic 1 1>;
0286
0287 interrupt-parent = <&mpic>;
0288 interrupts = <24 2>;
0289 bus-range = <0 0>;
0290 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
0291 0x01000000 0 0x00000000 0xe2000000 0 0x00100000>;
0292 clock-frequency = <66666666>;
0293 #interrupt-cells = <1>;
0294 #size-cells = <2>;
0295 #address-cells = <3>;
0296 reg = <0xfdf08000 0x1000>;
0297 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
0298 device_type = "pci";
0299 };
0300 };
