0001 /*
0002 * Device Tree Source for IOMEGA StorCenter
0003 *
0004 * Copyright 2007 Oyvind Repvik
0005 * Copyright 2007 Jon Loeliger
0006 *
0007 * Based on the Kurobox DTS by G. Liakhovetski <g.liakhovetski@gmx.de>
0008 *
0009 * This file is licensed under the terms of the GNU General Public
0010 * License version 2. This program is licensed "as is" without any
0011 * warranty of any kind, whether express or implied.
0012 */
0013
0014 /dts-v1/;
0015
0016 / {
0017 model = "StorCenter";
0018 compatible = "iomega,storcenter";
0019 #address-cells = <1>;
0020 #size-cells = <1>;
0021
0022 aliases {
0023 serial0 = &serial0;
0024 serial1 = &serial1;
0025 pci0 = &pci0;
0026 };
0027
0028 cpus {
0029 #address-cells = <1>;
0030 #size-cells = <0>;
0031
0032 PowerPC,8241@0 {
0033 device_type = "cpu";
0034 reg = <0>;
0035 clock-frequency = <200000000>;
0036 timebase-frequency = <25000000>;
0037 bus-frequency = <0>; /* from bootwrapper */
0038 i-cache-line-size = <32>;
0039 d-cache-line-size = <32>;
0040 i-cache-size = <16384>;
0041 d-cache-size = <16384>;
0042 };
0043 };
0044
0045 memory {
0046 device_type = "memory";
0047 reg = <0x00000000 0x04000000>; /* 64MB @ 0x0 */
0048 };
0049
0050 soc@fc000000 {
0051 #address-cells = <1>;
0052 #size-cells = <1>;
0053 device_type = "soc";
0054 compatible = "fsl,mpc8241", "mpc10x";
0055 store-gathering = <0>; /* 0 == off, !0 == on */
0056 ranges = <0x0 0xfc000000 0x100000>;
0057 reg = <0xfc000000 0x100000>; /* EUMB */
0058 bus-frequency = <0>; /* fixed by loader */
0059
0060 i2c@3000 {
0061 #address-cells = <1>;
0062 #size-cells = <0>;
0063 compatible = "fsl-i2c";
0064 reg = <0x3000 0x100>;
0065 interrupts = <17 2>;
0066 interrupt-parent = <&mpic>;
0067
0068 rtc@68 {
0069 compatible = "dallas,ds1337";
0070 reg = <0x68>;
0071 };
0072 };
0073
0074 serial0: serial@4500 {
0075 cell-index = <0>;
0076 device_type = "serial";
0077 compatible = "fsl,ns16550", "ns16550";
0078 reg = <0x4500 0x20>;
0079 clock-frequency = <97553800>; /* Hz */
0080 current-speed = <115200>;
0081 interrupts = <25 2>;
0082 interrupt-parent = <&mpic>;
0083 };
0084
0085 serial1: serial@4600 {
0086 cell-index = <1>;
0087 device_type = "serial";
0088 compatible = "fsl,ns16550", "ns16550";
0089 reg = <0x4600 0x20>;
0090 clock-frequency = <97553800>; /* Hz */
0091 current-speed = <9600>;
0092 interrupts = <26 2>;
0093 interrupt-parent = <&mpic>;
0094 };
0095
0096 mpic: interrupt-controller@40000 {
0097 #interrupt-cells = <2>;
0098 #address-cells = <0>;
0099 device_type = "open-pic";
0100 compatible = "chrp,open-pic";
0101 interrupt-controller;
0102 reg = <0x40000 0x40000>;
0103 };
0104
0105 };
0106
0107 pci0: pci@fe800000 {
0108 #address-cells = <3>;
0109 #size-cells = <2>;
0110 #interrupt-cells = <1>;
0111 device_type = "pci";
0112 compatible = "mpc10x-pci";
0113 reg = <0xfe800000 0x1000>;
0114 ranges = <0x01000000 0x0 0x0 0xfe000000 0x0 0x00c00000
0115 0x02000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
0116 bus-range = <0 0xff>;
0117 clock-frequency = <97553800>;
0118 interrupt-parent = <&mpic>;
0119 interrupt-map-mask = <0xf800 0 0 7>;
0120 interrupt-map = <
0121 /* IDSEL 13 - IDE */
0122 0x6800 0 0 1 &mpic 0 1
0123 0x6800 0 0 2 &mpic 0 1
0124 0x6800 0 0 3 &mpic 0 1
0125 0x6800 0 0 4 &mpic 0 1
0126 /* IDSEL 14 - USB */
0127 0x7000 0 0 1 &mpic 0 1
0128 0x7000 0 0 2 &mpic 0 1
0129 0x7000 0 0 3 &mpic 0 1
0130 0x7000 0 0 4 &mpic 0 1
0131 /* IDSEL 15 - ETH */
0132 0x7800 0 0 1 &mpic 0 1
0133 0x7800 0 0 2 &mpic 0 1
0134 0x7800 0 0 3 &mpic 0 1
0135 0x7800 0 0 4 &mpic 0 1
0136 >;
0137 };
0138
0139 chosen {
0140 stdout-path = &serial0;
0141 };
0142 };
