0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * Device Tree Source for the Socrates board (MPC8544).
0004 *
0005 * Copyright (c) 2008 Emcraft Systems.
0006 * Sergei Poselenov, <sposelenov@emcraft.com>
0007 */
0008
0009 /dts-v1/;
0010
0011 / {
0012 model = "abb,socrates";
0013 compatible = "abb,socrates";
0014 #address-cells = <1>;
0015 #size-cells = <1>;
0016
0017 aliases {
0018 ethernet0 = &enet0;
0019 ethernet1 = &enet1;
0020 serial0 = &serial0;
0021 serial1 = &serial1;
0022 pci0 = &pci0;
0023 };
0024
0025 cpus {
0026 #address-cells = <1>;
0027 #size-cells = <0>;
0028
0029 PowerPC,8544@0 {
0030 device_type = "cpu";
0031 reg = <0>;
0032 d-cache-line-size = <32>;
0033 i-cache-line-size = <32>;
0034 d-cache-size = <0x8000>; // L1, 32K
0035 i-cache-size = <0x8000>; // L1, 32K
0036 timebase-frequency = <0>;
0037 bus-frequency = <0>;
0038 clock-frequency = <0>;
0039 next-level-cache = <&L2>;
0040 };
0041 };
0042
0043 memory {
0044 device_type = "memory";
0045 reg = <0x00000000 0x00000000>; // Filled in by U-Boot
0046 };
0047
0048 soc8544@e0000000 {
0049 #address-cells = <1>;
0050 #size-cells = <1>;
0051 device_type = "soc";
0052
0053 ranges = <0x00000000 0xe0000000 0x00100000>;
0054 bus-frequency = <0>; // Filled in by U-Boot
0055 compatible = "fsl,mpc8544-immr", "simple-bus";
0056
0057 ecm-law@0 {
0058 compatible = "fsl,ecm-law";
0059 reg = <0x0 0x1000>;
0060 fsl,num-laws = <10>;
0061 };
0062
0063 ecm@1000 {
0064 compatible = "fsl,mpc8544-ecm", "fsl,ecm";
0065 reg = <0x1000 0x1000>;
0066 interrupts = <17 2>;
0067 interrupt-parent = <&mpic>;
0068 };
0069
0070 memory-controller@2000 {
0071 compatible = "fsl,mpc8544-memory-controller";
0072 reg = <0x2000 0x1000>;
0073 interrupt-parent = <&mpic>;
0074 interrupts = <18 2>;
0075 };
0076
0077 L2: l2-cache-controller@20000 {
0078 compatible = "fsl,mpc8544-l2-cache-controller";
0079 reg = <0x20000 0x1000>;
0080 cache-line-size = <32>;
0081 cache-size = <0x40000>; // L2, 256K
0082 interrupt-parent = <&mpic>;
0083 interrupts = <16 2>;
0084 };
0085
0086 i2c@3000 {
0087 #address-cells = <1>;
0088 #size-cells = <0>;
0089 cell-index = <0>;
0090 compatible = "fsl,mpc8544-i2c", "fsl-i2c";
0091 reg = <0x3000 0x100>;
0092 interrupts = <43 2>;
0093 interrupt-parent = <&mpic>;
0094 fsl,preserve-clocking;
0095
0096 dtt@28 {
0097 compatible = "winbond,w83782d";
0098 reg = <0x28>;
0099 };
0100 rtc@32 {
0101 compatible = "epson,rx8025";
0102 reg = <0x32>;
0103 interrupts = <7 1>;
0104 interrupt-parent = <&mpic>;
0105 };
0106 dtt@4c {
0107 compatible = "dallas,ds75";
0108 reg = <0x4c>;
0109 };
0110 ts@4a {
0111 compatible = "ti,tsc2003";
0112 reg = <0x4a>;
0113 interrupt-parent = <&mpic>;
0114 interrupts = <8 1>;
0115 };
0116 };
0117
0118 i2c@3100 {
0119 #address-cells = <1>;
0120 #size-cells = <0>;
0121 cell-index = <1>;
0122 compatible = "fsl,mpc8544-i2c", "fsl-i2c";
0123 reg = <0x3100 0x100>;
0124 interrupts = <43 2>;
0125 interrupt-parent = <&mpic>;
0126 fsl,preserve-clocking;
0127 };
0128
0129 enet0: ethernet@24000 {
0130 #address-cells = <1>;
0131 #size-cells = <1>;
0132 cell-index = <0>;
0133 device_type = "network";
0134 model = "eTSEC";
0135 compatible = "gianfar";
0136 reg = <0x24000 0x1000>;
0137 ranges = <0x0 0x24000 0x1000>;
0138 local-mac-address = [ 00 00 00 00 00 00 ];
0139 interrupts = <29 2 30 2 34 2>;
0140 interrupt-parent = <&mpic>;
0141 phy-handle = <&phy0>;
0142 tbi-handle = <&tbi0>;
0143 phy-connection-type = "rgmii-id";
0144
0145 mdio@520 {
0146 #address-cells = <1>;
0147 #size-cells = <0>;
0148 compatible = "fsl,gianfar-mdio";
0149 reg = <0x520 0x20>;
0150
0151 phy0: ethernet-phy@0 {
0152 interrupt-parent = <&mpic>;
0153 interrupts = <0 1>;
0154 reg = <0>;
0155 };
0156 phy1: ethernet-phy@1 {
0157 interrupt-parent = <&mpic>;
0158 interrupts = <0 1>;
0159 reg = <1>;
0160 };
0161 tbi0: tbi-phy@11 {
0162 reg = <0x11>;
0163 };
0164 };
0165 };
0166
0167 enet1: ethernet@26000 {
0168 #address-cells = <1>;
0169 #size-cells = <1>;
0170 cell-index = <1>;
0171 device_type = "network";
0172 model = "eTSEC";
0173 compatible = "gianfar";
0174 reg = <0x26000 0x1000>;
0175 ranges = <0x0 0x26000 0x1000>;
0176 local-mac-address = [ 00 00 00 00 00 00 ];
0177 interrupts = <31 2 32 2 33 2>;
0178 interrupt-parent = <&mpic>;
0179 phy-handle = <&phy1>;
0180 tbi-handle = <&tbi1>;
0181 phy-connection-type = "rgmii-id";
0182
0183 mdio@520 {
0184 #address-cells = <1>;
0185 #size-cells = <0>;
0186 compatible = "fsl,gianfar-tbi";
0187 reg = <0x520 0x20>;
0188
0189 tbi1: tbi-phy@11 {
0190 reg = <0x11>;
0191 };
0192 };
0193 };
0194
0195 serial0: serial@4500 {
0196 cell-index = <0>;
0197 device_type = "serial";
0198 compatible = "fsl,ns16550", "ns16550";
0199 reg = <0x4500 0x100>;
0200 clock-frequency = <0>;
0201 interrupts = <42 2>;
0202 interrupt-parent = <&mpic>;
0203 };
0204
0205 serial1: serial@4600 {
0206 cell-index = <1>;
0207 device_type = "serial";
0208 compatible = "fsl,ns16550", "ns16550";
0209 reg = <0x4600 0x100>;
0210 clock-frequency = <0>;
0211 interrupts = <42 2>;
0212 interrupt-parent = <&mpic>;
0213 };
0214
0215 global-utilities@e0000 { //global utilities block
0216 compatible = "fsl,mpc8548-guts";
0217 reg = <0xe0000 0x1000>;
0218 fsl,has-rstcr;
0219 };
0220
0221 mpic: pic@40000 {
0222 interrupt-controller;
0223 #address-cells = <0>;
0224 #interrupt-cells = <2>;
0225 reg = <0x40000 0x40000>;
0226 compatible = "chrp,open-pic";
0227 device_type = "open-pic";
0228 };
0229 };
0230
0231
0232 localbus {
0233 compatible = "fsl,mpc8544-localbus",
0234 "fsl,pq3-localbus",
0235 "simple-bus";
0236 #address-cells = <2>;
0237 #size-cells = <1>;
0238 reg = <0xe0005000 0x40>;
0239 interrupt-parent = <&mpic>;
0240 interrupts = <19 2>;
0241
0242 ranges = <0 0 0xfc000000 0x04000000
0243 2 0 0xc8000000 0x04000000
0244 3 0 0xc0000000 0x00100000
0245 >; /* Overwritten by U-Boot */
0246
0247 nor_flash@0,0 {
0248 compatible = "amd,s29gl256n", "cfi-flash";
0249 bank-width = <2>;
0250 reg = <0x0 0x000000 0x4000000>;
0251 #address-cells = <1>;
0252 #size-cells = <1>;
0253 partition@0 {
0254 label = "kernel";
0255 reg = <0x0 0x1e0000>;
0256 read-only;
0257 };
0258 partition@1e0000 {
0259 label = "dtb";
0260 reg = <0x1e0000 0x20000>;
0261 };
0262 partition@200000 {
0263 label = "root";
0264 reg = <0x200000 0x200000>;
0265 };
0266 partition@400000 {
0267 label = "user";
0268 reg = <0x400000 0x3b80000>;
0269 };
0270 partition@3f80000 {
0271 label = "env";
0272 reg = <0x3f80000 0x40000>;
0273 read-only;
0274 };
0275 partition@3fc0000 {
0276 label = "u-boot";
0277 reg = <0x3fc0000 0x40000>;
0278 read-only;
0279 };
0280 };
0281
0282 display@2,0 {
0283 compatible = "fujitsu,lime";
0284 reg = <2 0x0 0x4000000>;
0285 interrupt-parent = <&mpic>;
0286 interrupts = <6 1>;
0287 };
0288
0289 fpga_pic: fpga-pic@3,10 {
0290 compatible = "abb,socrates-fpga-pic";
0291 reg = <3 0x10 0x10>;
0292 interrupt-controller;
0293 /* IRQs 2, 10, 11, active low, level-sensitive */
0294 interrupts = <2 1 10 1 11 1>;
0295 interrupt-parent = <&mpic>;
0296 #interrupt-cells = <3>;
0297 };
0298
0299 spi@3,60 {
0300 compatible = "abb,socrates-spi";
0301 reg = <3 0x60 0x10>;
0302 interrupts = <8 4 0>; // number, type, routing
0303 interrupt-parent = <&fpga_pic>;
0304 };
0305
0306 nand@3,70 {
0307 compatible = "abb,socrates-nand";
0308 reg = <3 0x70 0x04>;
0309 bank-width = <1>;
0310 #address-cells = <1>;
0311 #size-cells = <1>;
0312 data@0 {
0313 label = "data";
0314 reg = <0x0 0x40000000>;
0315 };
0316 };
0317
0318 can@3,100 {
0319 compatible = "philips,sja1000";
0320 reg = <3 0x100 0x80>;
0321 interrupts = <2 8 1>; // number, type, routing
0322 interrupt-parent = <&fpga_pic>;
0323 };
0324 };
0325
0326 pci0: pci@e0008000 {
0327 #interrupt-cells = <1>;
0328 #size-cells = <2>;
0329 #address-cells = <3>;
0330 compatible = "fsl,mpc8540-pci";
0331 device_type = "pci";
0332 reg = <0xe0008000 0x1000>;
0333 clock-frequency = <66666666>;
0334
0335 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0336 interrupt-map = <
0337 /* IDSEL 0x11 */
0338 0x8800 0x0 0x0 1 &mpic 5 1
0339 /* IDSEL 0x12 */
0340 0x9000 0x0 0x0 1 &mpic 4 1>;
0341 interrupt-parent = <&mpic>;
0342 interrupts = <24 2>;
0343 bus-range = <0x0 0x0>;
0344 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
0345 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
0346 };
0347
0348 };
