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0001 /*
0002  * Device Tree Source for Motorola/Emerson MVME5100.
0003  *
0004  * Copyright 2013 CSC Australia Pty. Ltd.
0005  *
0006  * This file is licensed under the terms of the GNU General Public
0007  * License version 2.  This program is licensed "as is" without
0008  * any warranty of any kind, whether express or implied.
0009  */
0010 
0011 /dts-v1/;
0012 
0013 / {
0014         model = "MVME5100";
0015         compatible = "MVME5100";
0016         #address-cells = <1>;
0017         #size-cells = <1>;
0018 
0019         aliases {
0020                 serial0 = &serial0;
0021                 pci0 = &pci0;
0022         };
0023 
0024         cpus {
0025                 #address-cells = <1>;
0026                 #size-cells = <0>;
0027 
0028                 PowerPC,7410 {
0029                         device_type = "cpu";
0030                         reg = <0x0>;
0031                         /* Following required by dtc but not used */
0032                         d-cache-line-size = <32>;
0033                         i-cache-line-size = <32>;
0034                         i-cache-size = <32768>;
0035                         d-cache-size = <32768>;
0036                         timebase-frequency = <25000000>;
0037                         clock-frequency = <500000000>;
0038                         bus-frequency = <100000000>;
0039                 };
0040         };
0041 
0042         memory {
0043                 device_type = "memory";
0044                 reg = <0x0 0x20000000>;
0045         };
0046 
0047         hawk@fef80000 {
0048                 #address-cells = <1>;
0049                 #size-cells = <1>;
0050                 compatible = "hawk-bridge", "simple-bus";
0051                 ranges = <0x0 0xfef80000 0x10000>;
0052                 reg = <0xfef80000 0x10000>;
0053 
0054                 serial0: serial@8000 {
0055                         device_type = "serial";
0056                         compatible = "ns16550";
0057                         reg = <0x8000 0x80>;
0058                         reg-shift = <4>;
0059                         clock-frequency = <1843200>;
0060                         current-speed = <9600>;
0061                         interrupts = <1 1>; // IRQ1 Level Active Low.
0062                         interrupt-parent = <&mpic>;
0063                 };
0064 
0065                 serial1: serial@8200 {
0066                         device_type = "serial";
0067                         compatible = "ns16550";
0068                         reg = <0x8200 0x80>;
0069                         reg-shift = <4>;
0070                         clock-frequency = <1843200>;
0071                         current-speed = <9600>;
0072                         interrupts = <1 1>; // IRQ1 Level Active Low.
0073                         interrupt-parent = <&mpic>;
0074                 };
0075 
0076                 mpic: interrupt-controller@f3f80000 {
0077                         #interrupt-cells = <2>;
0078                         #address-cells = <0>;
0079                         device_type = "open-pic";
0080                         compatible = "chrp,open-pic";
0081                         interrupt-controller;
0082                         reg = <0xf3f80000 0x40000>;
0083                 };
0084         };
0085 
0086         pci0: pci@feff0000 {
0087                 #address-cells = <3>;
0088                 #size-cells = <2>;
0089                 #interrupt-cells = <1>;
0090                 device_type = "pci";
0091                 compatible = "hawk-pci";
0092                 reg = <0xfec00000 0x400000>;
0093                 8259-interrupt-acknowledge = <0xfeff0030>;
0094                 ranges = <0x1000000 0x0        0x0 0xfe000000 0x0 0x800000
0095                           0x2000000 0x0 0x80000000 0x80000000 0x0 0x74000000>;
0096                 bus-range = <0 255>;
0097                 clock-frequency = <33333333>;
0098                 interrupt-parent = <&mpic>;
0099                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0100                 interrupt-map = <
0101 
0102                         /*
0103                          * This definition (IDSEL 11) duplicates the
0104                          * interrupts definition in the i8259
0105                          * interrupt controller below.
0106                          *
0107                          * Do not change the interrupt sense/polarity from
0108                          * 0x2 to anything else, doing so will cause endless
0109                          * "spurious" i8259 interrupts to be fielded.
0110                          */
0111                         // IDSEL 11 - iPMC712 PCI/ISA Bridge
0112                         0x5800 0x0 0x0 0x1 &mpic 0x0 0x2
0113                         0x5800 0x0 0x0 0x2 &mpic 0x0 0x2
0114                         0x5800 0x0 0x0 0x3 &mpic 0x0 0x2
0115                         0x5800 0x0 0x0 0x4 &mpic 0x0 0x2
0116 
0117                         /* IDSEL 12 - Not Used */
0118 
0119                         /* IDSEL 13 - Universe VME Bridge */
0120                         0x6800 0x0 0x0 0x1 &mpic 0x5 0x1
0121                         0x6800 0x0 0x0 0x2 &mpic 0x6 0x1
0122                         0x6800 0x0 0x0 0x3 &mpic 0x7 0x1
0123                         0x6800 0x0 0x0 0x4 &mpic 0x8 0x1
0124 
0125                         /* IDSEL 14 - ENET 1 */
0126                         0x7000 0x0 0x0 0x1 &mpic 0x2 0x1
0127 
0128                         /* IDSEL 15 - Not Used */
0129 
0130                         /* IDSEL 16 - PMC Slot 1 */
0131                         0x8000 0x0 0x0 0x1 &mpic 0x9 0x1
0132                         0x8000 0x0 0x0 0x2 &mpic 0xa 0x1
0133                         0x8000 0x0 0x0 0x3 &mpic 0xb 0x1
0134                         0x8000 0x0 0x0 0x4 &mpic 0xc 0x1
0135 
0136                         /* IDSEL 17 - PMC Slot 2 */
0137                         0x8800 0x0 0x0 0x1 &mpic 0xc 0x1
0138                         0x8800 0x0 0x0 0x2 &mpic 0x9 0x1
0139                         0x8800 0x0 0x0 0x3 &mpic 0xa 0x1
0140                         0x8800 0x0 0x0 0x4 &mpic 0xb 0x1
0141 
0142                         /* IDSEL 18 - Not Used */
0143 
0144                         /* IDSEL 19 - ENET 2 */
0145                         0x9800 0x0 0x0 0x1 &mpic 0xd 0x1
0146 
0147                         /* IDSEL 20 - PMCSPAN (PCI-X) */
0148                         0xa000 0x0 0x0 0x1 &mpic 0x9 0x1
0149                         0xa000 0x0 0x0 0x2 &mpic 0xa 0x1
0150                         0xa000 0x0 0x0 0x3 &mpic 0xb 0x1
0151                         0xa000 0x0 0x0 0x4 &mpic 0xc 0x1
0152 
0153                 >;
0154 
0155                 isa {
0156                         #address-cells = <2>;
0157                         #size-cells = <1>;
0158                         #interrupt-cells = <2>;
0159                         device_type = "isa";
0160                         compatible = "isa";
0161                         ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00001000>;
0162                         interrupt-parent = <&i8259>;
0163 
0164                         i8259: interrupt-controller@20 {
0165                                 #interrupt-cells = <2>;
0166                                 #address-cells = <0>;
0167                                 interrupts = <0 2>;
0168                                 device_type = "interrupt-controller";
0169                                 compatible = "chrp,iic";
0170                                 interrupt-controller;
0171                                 reg = <1 0x00000020 0x00000002
0172                                        1 0x000000a0 0x00000002
0173                                        1 0x000004d0 0x00000002>;
0174                                 interrupt-parent = <&mpic>;
0175                         };
0176 
0177                 };
0178 
0179         };
0180 
0181         chosen {
0182                 stdout-path = &serial0;
0183         };
0184 
0185 };