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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Manroland mucmc52 board Device Tree Source
0004  *
0005  * Copyright (C) 2009 DENX Software Engineering GmbH
0006  * Heiko Schocher <hs@denx.de>
0007  * Copyright 2006-2007 Secret Lab Technologies Ltd.
0008  */
0009 
0010 /include/ "mpc5200b.dtsi"
0011 
0012 /* Timer pins that need to be in GPIO mode */
0013 &gpt0 { gpio-controller; };
0014 &gpt1 { gpio-controller; };
0015 &gpt2 { gpio-controller; };
0016 &gpt3 { gpio-controller; };
0017 
0018 /* Disabled timers */
0019 &gpt4 { status = "disabled"; };
0020 &gpt5 { status = "disabled"; };
0021 &gpt6 { status = "disabled"; };
0022 &gpt7 { status = "disabled"; };
0023 
0024 / {
0025         model = "manroland,mucmc52";
0026         compatible = "manroland,mucmc52";
0027 
0028         soc5200@f0000000 {
0029                 rtc@800 {
0030                         status = "disabled";
0031                 };
0032 
0033                 can@900 {
0034                         status = "disabled";
0035                 };
0036 
0037                 can@980 {
0038                         status = "disabled";
0039                 };
0040 
0041                 spi@f00 {
0042                         status = "disabled";
0043                 };
0044 
0045                 usb@1000 {
0046                         status = "disabled";
0047                 };
0048 
0049                 psc@2000 {              // PSC1
0050                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
0051                 };
0052 
0053                 psc@2200 {              // PSC2
0054                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
0055                 };
0056 
0057                 psc@2400 {              // PSC3
0058                         status = "disabled";
0059                 };
0060 
0061                 psc@2600 {              // PSC4
0062                         status = "disabled";
0063                 };
0064 
0065                 psc@2800 {              // PSC5
0066                         status = "disabled";
0067                 };
0068 
0069                 psc@2c00 {              // PSC6
0070                         compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
0071                 };
0072 
0073                 ethernet@3000 {
0074                         phy-handle = <&phy0>;
0075                 };
0076 
0077                 mdio@3000 {
0078                         phy0: ethernet-phy@0 {
0079                                 compatible = "intel,lxt971";
0080                                 reg = <0>;
0081                         };
0082                 };
0083 
0084                 i2c@3d00 {
0085                         status = "disabled";
0086                 };
0087 
0088                 i2c@3d40 {
0089                         hwmon@2c {
0090                                 compatible = "ad,adm9240";
0091                                 reg = <0x2c>;
0092                         };
0093                         rtc@51 {
0094                                 compatible = "nxp,pcf8563";
0095                                 reg = <0x51>;
0096                         };
0097                 };
0098         };
0099 
0100         pci@f0000d00 {
0101                 interrupt-map-mask = <0xf800 0 0 7>;
0102                 interrupt-map = <
0103                                 /* IDSEL 0x10 */
0104                                 0x8000 0 0 1 &mpc5200_pic 0 3 3
0105                                 0x8000 0 0 2 &mpc5200_pic 0 3 3
0106                                 0x8000 0 0 3 &mpc5200_pic 0 2 3
0107                                 0x8000 0 0 4 &mpc5200_pic 0 1 3
0108                                 >;
0109                 ranges = <0x42000000 0 0x60000000 0x60000000 0 0x10000000>,
0110                          <0x02000000 0 0x90000000 0x90000000 0 0x10000000>,
0111                          <0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
0112         };
0113 
0114         localbus {
0115                 ranges = <0 0 0xff800000 0x00800000
0116                           1 0 0x80000000 0x00800000
0117                           3 0 0x80000000 0x00800000>;
0118 
0119                 flash@0,0 {
0120                         compatible = "cfi-flash";
0121                         reg = <0 0 0x00800000>;
0122                         bank-width = <4>;
0123                         device-width = <2>;
0124                         #size-cells = <1>;
0125                         #address-cells = <1>;
0126                         partition@0 {
0127                                 label = "DTS";
0128                                 reg = <0x0 0x00100000>;
0129                         };
0130                         partition@100000 {
0131                                 label = "Kernel";
0132                                 reg = <0x100000 0x00200000>;
0133                         };
0134                         partition@300000 {
0135                                 label = "RootFS";
0136                                 reg = <0x00300000 0x00200000>;
0137                         };
0138                         partition@500000 {
0139                                 label = "user";
0140                                 reg = <0x00500000 0x00200000>;
0141                         };
0142                         partition@700000 {
0143                                 label = "U-Boot";
0144                                 reg = <0x00700000 0x00040000>;
0145                         };
0146                         partition@740000 {
0147                                 label = "Env";
0148                                 reg = <0x00740000 0x00020000>;
0149                         };
0150                         partition@760000 {
0151                                 label = "red. Env";
0152                                 reg = <0x00760000 0x00020000>;
0153                         };
0154                         partition@780000 {
0155                                 label = "reserve";
0156                                 reg = <0x00780000 0x00080000>;
0157                         };
0158                 };
0159 
0160                 simple100: gpio-controller-100@3,600100 {
0161                         compatible = "manroland,mucmc52-aux-gpio";
0162                         reg = <3 0x00600100 0x1>;
0163                         gpio-controller;
0164                         #gpio-cells = <2>;
0165                 };
0166                 simple104: gpio-controller-104@3,600104 {
0167                         compatible = "manroland,mucmc52-aux-gpio";
0168                         reg = <3 0x00600104 0x1>;
0169                         gpio-controller;
0170                         #gpio-cells = <2>;
0171                 };
0172                 simple200: gpio-controller-200@3,600200 {
0173                         compatible = "manroland,mucmc52-aux-gpio";
0174                         reg = <3 0x00600200 0x1>;
0175                         gpio-controller;
0176                         #gpio-cells = <2>;
0177                 };
0178                 simple201: gpio-controller-201@3,600201 {
0179                         compatible = "manroland,mucmc52-aux-gpio";
0180                         reg = <3 0x00600201 0x1>;
0181                         gpio-controller;
0182                         #gpio-cells = <2>;
0183                 };
0184                 simple202: gpio-controller-202@3,600202 {
0185                         compatible = "manroland,mucmc52-aux-gpio";
0186                         reg = <3 0x00600202 0x1>;
0187                         gpio-controller;
0188                         #gpio-cells = <2>;
0189                 };
0190                 simple203: gpio-controller-203@3,600203 {
0191                         compatible = "manroland,mucmc52-aux-gpio";
0192                         reg = <3 0x00600203 0x1>;
0193                         gpio-controller;
0194                         #gpio-cells = <2>;
0195                 };
0196                 simple204: gpio-controller-204@3,600204 {
0197                         compatible = "manroland,mucmc52-aux-gpio";
0198                         reg = <3 0x00600204 0x1>;
0199                         gpio-controller;
0200                         #gpio-cells = <2>;
0201                 };
0202                 simple206: gpio-controller-206@3,600206 {
0203                         compatible = "manroland,mucmc52-aux-gpio";
0204                         reg = <3 0x00600206 0x1>;
0205                         gpio-controller;
0206                         #gpio-cells = <2>;
0207                 };
0208                 simple207: gpio-controller-207@3,600207 {
0209                         compatible = "manroland,mucmc52-aux-gpio";
0210                         reg = <3 0x00600207 0x1>;
0211                         gpio-controller;
0212                         #gpio-cells = <2>;
0213                 };
0214                 simple20f: gpio-controller-20f@3,60020f {
0215                         compatible = "manroland,mucmc52-aux-gpio";
0216                         reg = <3 0x0060020f 0x1>;
0217                         gpio-controller;
0218                         #gpio-cells = <2>;
0219                 };
0220 
0221         };
0222 };