0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * MPC8379E MDS Device Tree Source
0004 *
0005 * Copyright 2007 Freescale Semiconductor Inc.
0006 */
0007
0008 /dts-v1/;
0009
0010 / {
0011 model = "fsl,mpc8379emds";
0012 compatible = "fsl,mpc8379emds","fsl,mpc837xmds";
0013 #address-cells = <1>;
0014 #size-cells = <1>;
0015
0016 aliases {
0017 ethernet0 = &enet0;
0018 ethernet1 = &enet1;
0019 serial0 = &serial0;
0020 serial1 = &serial1;
0021 pci0 = &pci0;
0022 };
0023
0024 cpus {
0025 #address-cells = <1>;
0026 #size-cells = <0>;
0027
0028 PowerPC,8379@0 {
0029 device_type = "cpu";
0030 reg = <0x0>;
0031 d-cache-line-size = <32>;
0032 i-cache-line-size = <32>;
0033 d-cache-size = <32768>;
0034 i-cache-size = <32768>;
0035 timebase-frequency = <0>;
0036 bus-frequency = <0>;
0037 clock-frequency = <0>;
0038 };
0039 };
0040
0041 memory {
0042 device_type = "memory";
0043 reg = <0x00000000 0x20000000>; // 512MB at 0
0044 };
0045
0046 localbus@e0005000 {
0047 #address-cells = <2>;
0048 #size-cells = <1>;
0049 compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
0050 reg = <0xe0005000 0x1000>;
0051 interrupts = <77 0x8>;
0052 interrupt-parent = <&ipic>;
0053
0054 // booting from NOR flash
0055 ranges = <0 0x0 0xfe000000 0x02000000
0056 1 0x0 0xf8000000 0x00008000
0057 3 0x0 0xe0600000 0x00008000>;
0058
0059 flash@0,0 {
0060 #address-cells = <1>;
0061 #size-cells = <1>;
0062 compatible = "cfi-flash";
0063 reg = <0 0x0 0x2000000>;
0064 bank-width = <2>;
0065 device-width = <1>;
0066
0067 u-boot@0 {
0068 reg = <0x0 0x100000>;
0069 read-only;
0070 };
0071
0072 fs@100000 {
0073 reg = <0x100000 0x800000>;
0074 };
0075
0076 kernel@1d00000 {
0077 reg = <0x1d00000 0x200000>;
0078 };
0079
0080 dtb@1f00000 {
0081 reg = <0x1f00000 0x100000>;
0082 };
0083 };
0084
0085 bcsr@1,0 {
0086 reg = <1 0x0 0x8000>;
0087 compatible = "fsl,mpc837xmds-bcsr";
0088 };
0089
0090 nand@3,0 {
0091 #address-cells = <1>;
0092 #size-cells = <1>;
0093 compatible = "fsl,mpc8379-fcm-nand",
0094 "fsl,elbc-fcm-nand";
0095 reg = <3 0x0 0x8000>;
0096
0097 u-boot@0 {
0098 reg = <0x0 0x100000>;
0099 read-only;
0100 };
0101
0102 kernel@100000 {
0103 reg = <0x100000 0x300000>;
0104 };
0105
0106 fs@400000 {
0107 reg = <0x400000 0x1c00000>;
0108 };
0109 };
0110 };
0111
0112 soc@e0000000 {
0113 #address-cells = <1>;
0114 #size-cells = <1>;
0115 device_type = "soc";
0116 compatible = "simple-bus";
0117 ranges = <0x0 0xe0000000 0x00100000>;
0118 reg = <0xe0000000 0x00000200>;
0119 bus-frequency = <0>;
0120
0121 wdt@200 {
0122 compatible = "mpc83xx_wdt";
0123 reg = <0x200 0x100>;
0124 };
0125
0126 sleep-nexus {
0127 #address-cells = <1>;
0128 #size-cells = <1>;
0129 compatible = "simple-bus";
0130 sleep = <&pmc 0x0c000000>;
0131 ranges;
0132
0133 i2c@3000 {
0134 #address-cells = <1>;
0135 #size-cells = <0>;
0136 cell-index = <0>;
0137 compatible = "fsl-i2c";
0138 reg = <0x3000 0x100>;
0139 interrupts = <14 0x8>;
0140 interrupt-parent = <&ipic>;
0141 dfsrr;
0142
0143 rtc@68 {
0144 compatible = "dallas,ds1374";
0145 reg = <0x68>;
0146 interrupts = <19 0x8>;
0147 interrupt-parent = <&ipic>;
0148 };
0149 };
0150
0151 sdhci@2e000 {
0152 compatible = "fsl,mpc8379-esdhc", "fsl,esdhc";
0153 reg = <0x2e000 0x1000>;
0154 interrupts = <42 0x8>;
0155 interrupt-parent = <&ipic>;
0156 sdhci,wp-inverted;
0157 /* Filled in by U-Boot */
0158 clock-frequency = <0>;
0159 };
0160 };
0161
0162 i2c@3100 {
0163 #address-cells = <1>;
0164 #size-cells = <0>;
0165 cell-index = <1>;
0166 compatible = "fsl-i2c";
0167 reg = <0x3100 0x100>;
0168 interrupts = <15 0x8>;
0169 interrupt-parent = <&ipic>;
0170 dfsrr;
0171 };
0172
0173 spi@7000 {
0174 cell-index = <0>;
0175 compatible = "fsl,spi";
0176 reg = <0x7000 0x1000>;
0177 interrupts = <16 0x8>;
0178 interrupt-parent = <&ipic>;
0179 mode = "cpu";
0180 };
0181
0182 dma@82a8 {
0183 #address-cells = <1>;
0184 #size-cells = <1>;
0185 compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
0186 reg = <0x82a8 4>;
0187 ranges = <0 0x8100 0x1a8>;
0188 interrupt-parent = <&ipic>;
0189 interrupts = <71 8>;
0190 cell-index = <0>;
0191 dma-channel@0 {
0192 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
0193 reg = <0 0x80>;
0194 cell-index = <0>;
0195 interrupt-parent = <&ipic>;
0196 interrupts = <71 8>;
0197 };
0198 dma-channel@80 {
0199 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
0200 reg = <0x80 0x80>;
0201 cell-index = <1>;
0202 interrupt-parent = <&ipic>;
0203 interrupts = <71 8>;
0204 };
0205 dma-channel@100 {
0206 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
0207 reg = <0x100 0x80>;
0208 cell-index = <2>;
0209 interrupt-parent = <&ipic>;
0210 interrupts = <71 8>;
0211 };
0212 dma-channel@180 {
0213 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
0214 reg = <0x180 0x28>;
0215 cell-index = <3>;
0216 interrupt-parent = <&ipic>;
0217 interrupts = <71 8>;
0218 };
0219 };
0220
0221 usb@23000 {
0222 compatible = "fsl-usb2-dr";
0223 reg = <0x23000 0x1000>;
0224 #address-cells = <1>;
0225 #size-cells = <0>;
0226 interrupt-parent = <&ipic>;
0227 interrupts = <38 0x8>;
0228 dr_mode = "host";
0229 phy_type = "ulpi";
0230 sleep = <&pmc 0x00c00000>;
0231 };
0232
0233 enet0: ethernet@24000 {
0234 #address-cells = <1>;
0235 #size-cells = <1>;
0236 cell-index = <0>;
0237 device_type = "network";
0238 model = "eTSEC";
0239 compatible = "gianfar";
0240 reg = <0x24000 0x1000>;
0241 ranges = <0x0 0x24000 0x1000>;
0242 local-mac-address = [ 00 00 00 00 00 00 ];
0243 interrupts = <32 0x8 33 0x8 34 0x8>;
0244 phy-connection-type = "mii";
0245 interrupt-parent = <&ipic>;
0246 tbi-handle = <&tbi0>;
0247 phy-handle = <&phy2>;
0248 sleep = <&pmc 0xc0000000>;
0249 fsl,magic-packet;
0250
0251 mdio@520 {
0252 #address-cells = <1>;
0253 #size-cells = <0>;
0254 compatible = "fsl,gianfar-mdio";
0255 reg = <0x520 0x20>;
0256
0257 phy2: ethernet-phy@2 {
0258 interrupt-parent = <&ipic>;
0259 interrupts = <17 0x8>;
0260 reg = <0x2>;
0261 };
0262
0263 phy3: ethernet-phy@3 {
0264 interrupt-parent = <&ipic>;
0265 interrupts = <18 0x8>;
0266 reg = <0x3>;
0267 };
0268
0269 tbi0: tbi-phy@11 {
0270 reg = <0x11>;
0271 device_type = "tbi-phy";
0272 };
0273 };
0274 };
0275
0276 enet1: ethernet@25000 {
0277 #address-cells = <1>;
0278 #size-cells = <1>;
0279 cell-index = <1>;
0280 device_type = "network";
0281 model = "eTSEC";
0282 compatible = "gianfar";
0283 reg = <0x25000 0x1000>;
0284 ranges = <0x0 0x25000 0x1000>;
0285 local-mac-address = [ 00 00 00 00 00 00 ];
0286 interrupts = <35 0x8 36 0x8 37 0x8>;
0287 phy-connection-type = "mii";
0288 interrupt-parent = <&ipic>;
0289 tbi-handle = <&tbi1>;
0290 phy-handle = <&phy3>;
0291 sleep = <&pmc 0x30000000>;
0292 fsl,magic-packet;
0293
0294 mdio@520 {
0295 #address-cells = <1>;
0296 #size-cells = <0>;
0297 compatible = "fsl,gianfar-tbi";
0298 reg = <0x520 0x20>;
0299
0300 tbi1: tbi-phy@11 {
0301 reg = <0x11>;
0302 device_type = "tbi-phy";
0303 };
0304 };
0305 };
0306
0307 serial0: serial@4500 {
0308 cell-index = <0>;
0309 device_type = "serial";
0310 compatible = "fsl,ns16550", "ns16550";
0311 reg = <0x4500 0x100>;
0312 clock-frequency = <0>;
0313 interrupts = <9 0x8>;
0314 interrupt-parent = <&ipic>;
0315 };
0316
0317 serial1: serial@4600 {
0318 cell-index = <1>;
0319 device_type = "serial";
0320 compatible = "fsl,ns16550", "ns16550";
0321 reg = <0x4600 0x100>;
0322 clock-frequency = <0>;
0323 interrupts = <10 0x8>;
0324 interrupt-parent = <&ipic>;
0325 };
0326
0327 crypto@30000 {
0328 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
0329 "fsl,sec2.1", "fsl,sec2.0";
0330 reg = <0x30000 0x10000>;
0331 interrupts = <11 0x8>;
0332 interrupt-parent = <&ipic>;
0333 fsl,num-channels = <4>;
0334 fsl,channel-fifo-len = <24>;
0335 fsl,exec-units-mask = <0x9fe>;
0336 fsl,descriptor-types-mask = <0x3ab0ebf>;
0337 sleep = <&pmc 0x03000000>;
0338 };
0339
0340 sata@18000 {
0341 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
0342 reg = <0x18000 0x1000>;
0343 interrupts = <44 0x8>;
0344 interrupt-parent = <&ipic>;
0345 sleep = <&pmc 0x000000c0>;
0346 };
0347
0348 sata@19000 {
0349 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
0350 reg = <0x19000 0x1000>;
0351 interrupts = <45 0x8>;
0352 interrupt-parent = <&ipic>;
0353 sleep = <&pmc 0x00000030>;
0354 };
0355
0356 sata@1a000 {
0357 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
0358 reg = <0x1a000 0x1000>;
0359 interrupts = <46 0x8>;
0360 interrupt-parent = <&ipic>;
0361 sleep = <&pmc 0x0000000c>;
0362 };
0363
0364 sata@1b000 {
0365 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
0366 reg = <0x1b000 0x1000>;
0367 interrupts = <47 0x8>;
0368 interrupt-parent = <&ipic>;
0369 sleep = <&pmc 0x00000003>;
0370 };
0371
0372 /* IPIC
0373 * interrupts cell = <intr #, sense>
0374 * sense values match linux IORESOURCE_IRQ_* defines:
0375 * sense == 8: Level, low assertion
0376 * sense == 2: Edge, high-to-low change
0377 */
0378 ipic: pic@700 {
0379 compatible = "fsl,ipic";
0380 interrupt-controller;
0381 #address-cells = <0>;
0382 #interrupt-cells = <2>;
0383 reg = <0x700 0x100>;
0384 };
0385
0386 pmc: power@b00 {
0387 compatible = "fsl,mpc8379-pmc", "fsl,mpc8349-pmc";
0388 reg = <0xb00 0x100 0xa00 0x100>;
0389 interrupts = <80 0x8>;
0390 interrupt-parent = <&ipic>;
0391 };
0392 };
0393
0394 pci0: pci@e0008500 {
0395 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0396 interrupt-map = <
0397
0398 /* IDSEL 0x11 */
0399 0x8800 0x0 0x0 0x1 &ipic 20 0x8
0400 0x8800 0x0 0x0 0x2 &ipic 21 0x8
0401 0x8800 0x0 0x0 0x3 &ipic 22 0x8
0402 0x8800 0x0 0x0 0x4 &ipic 23 0x8
0403
0404 /* IDSEL 0x12 */
0405 0x9000 0x0 0x0 0x1 &ipic 22 0x8
0406 0x9000 0x0 0x0 0x2 &ipic 23 0x8
0407 0x9000 0x0 0x0 0x3 &ipic 20 0x8
0408 0x9000 0x0 0x0 0x4 &ipic 21 0x8
0409
0410 /* IDSEL 0x13 */
0411 0x9800 0x0 0x0 0x1 &ipic 23 0x8
0412 0x9800 0x0 0x0 0x2 &ipic 20 0x8
0413 0x9800 0x0 0x0 0x3 &ipic 21 0x8
0414 0x9800 0x0 0x0 0x4 &ipic 22 0x8
0415
0416 /* IDSEL 0x15 */
0417 0xa800 0x0 0x0 0x1 &ipic 20 0x8
0418 0xa800 0x0 0x0 0x2 &ipic 21 0x8
0419 0xa800 0x0 0x0 0x3 &ipic 22 0x8
0420 0xa800 0x0 0x0 0x4 &ipic 23 0x8
0421
0422 /* IDSEL 0x16 */
0423 0xb000 0x0 0x0 0x1 &ipic 23 0x8
0424 0xb000 0x0 0x0 0x2 &ipic 20 0x8
0425 0xb000 0x0 0x0 0x3 &ipic 21 0x8
0426 0xb000 0x0 0x0 0x4 &ipic 22 0x8
0427
0428 /* IDSEL 0x17 */
0429 0xb800 0x0 0x0 0x1 &ipic 22 0x8
0430 0xb800 0x0 0x0 0x2 &ipic 23 0x8
0431 0xb800 0x0 0x0 0x3 &ipic 20 0x8
0432 0xb800 0x0 0x0 0x4 &ipic 21 0x8
0433
0434 /* IDSEL 0x18 */
0435 0xc000 0x0 0x0 0x1 &ipic 21 0x8
0436 0xc000 0x0 0x0 0x2 &ipic 22 0x8
0437 0xc000 0x0 0x0 0x3 &ipic 23 0x8
0438 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
0439 interrupt-parent = <&ipic>;
0440 interrupts = <66 0x8>;
0441 bus-range = <0x0 0x0>;
0442 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0443 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0444 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
0445 sleep = <&pmc 0x00010000>;
0446 clock-frequency = <0>;
0447 #interrupt-cells = <1>;
0448 #size-cells = <2>;
0449 #address-cells = <3>;
0450 reg = <0xe0008500 0x100 /* internal registers */
0451 0xe0008300 0x8>; /* config space access registers */
0452 compatible = "fsl,mpc8349-pci";
0453 device_type = "pci";
0454 };
0455 };
