0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * MPC8377E WLAN Device Tree Source
0004 *
0005 * Copyright 2007-2009 Freescale Semiconductor Inc.
0006 * Copyright 2009 MontaVista Software, Inc.
0007 */
0008
0009 /dts-v1/;
0010
0011 / {
0012 compatible = "fsl,mpc8377wlan";
0013 #address-cells = <1>;
0014 #size-cells = <1>;
0015
0016 aliases {
0017 ethernet0 = &enet0;
0018 ethernet1 = &enet1;
0019 serial0 = &serial0;
0020 serial1 = &serial1;
0021 pci0 = &pci0;
0022 pci1 = &pci1;
0023 pci2 = &pci2;
0024 };
0025
0026 cpus {
0027 #address-cells = <1>;
0028 #size-cells = <0>;
0029
0030 PowerPC,8377@0 {
0031 device_type = "cpu";
0032 reg = <0x0>;
0033 d-cache-line-size = <32>;
0034 i-cache-line-size = <32>;
0035 d-cache-size = <32768>;
0036 i-cache-size = <32768>;
0037 timebase-frequency = <0>;
0038 bus-frequency = <0>;
0039 clock-frequency = <0>;
0040 };
0041 };
0042
0043 memory {
0044 device_type = "memory";
0045 reg = <0x00000000 0x20000000>; // 512MB at 0
0046 };
0047
0048 localbus@e0005000 {
0049 #address-cells = <2>;
0050 #size-cells = <1>;
0051 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
0052 reg = <0xe0005000 0x1000>;
0053 interrupts = <77 0x8>;
0054 interrupt-parent = <&ipic>;
0055 ranges = <0x0 0x0 0xfc000000 0x04000000>;
0056
0057 flash@0,0 {
0058 #address-cells = <1>;
0059 #size-cells = <1>;
0060 compatible = "cfi-flash";
0061 reg = <0x0 0x0 0x4000000>;
0062 bank-width = <2>;
0063 device-width = <1>;
0064
0065 partition@0 {
0066 reg = <0 0x80000>;
0067 label = "u-boot";
0068 read-only;
0069 };
0070
0071 partition@a0000 {
0072 reg = <0xa0000 0x300000>;
0073 label = "kernel";
0074 };
0075
0076 partition@3a0000 {
0077 reg = <0x3a0000 0x3c60000>;
0078 label = "rootfs";
0079 };
0080 };
0081 };
0082
0083 immr@e0000000 {
0084 #address-cells = <1>;
0085 #size-cells = <1>;
0086 device_type = "soc";
0087 compatible = "simple-bus";
0088 ranges = <0x0 0xe0000000 0x00100000>;
0089 reg = <0xe0000000 0x00000200>;
0090 bus-frequency = <0>;
0091
0092 wdt@200 {
0093 device_type = "watchdog";
0094 compatible = "mpc83xx_wdt";
0095 reg = <0x200 0x100>;
0096 };
0097
0098 gpio1: gpio-controller@c00 {
0099 #gpio-cells = <2>;
0100 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
0101 reg = <0xc00 0x100>;
0102 interrupts = <74 0x8>;
0103 interrupt-parent = <&ipic>;
0104 gpio-controller;
0105 };
0106
0107 gpio2: gpio-controller@d00 {
0108 #gpio-cells = <2>;
0109 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
0110 reg = <0xd00 0x100>;
0111 interrupts = <75 0x8>;
0112 interrupt-parent = <&ipic>;
0113 gpio-controller;
0114 };
0115
0116 sleep-nexus {
0117 #address-cells = <1>;
0118 #size-cells = <1>;
0119 compatible = "simple-bus";
0120 sleep = <&pmc 0x0c000000>;
0121 ranges;
0122
0123 i2c@3000 {
0124 #address-cells = <1>;
0125 #size-cells = <0>;
0126 cell-index = <0>;
0127 compatible = "fsl-i2c";
0128 reg = <0x3000 0x100>;
0129 interrupts = <14 0x8>;
0130 interrupt-parent = <&ipic>;
0131 dfsrr;
0132
0133 at24@50 {
0134 compatible = "atmel,24c256";
0135 reg = <0x50>;
0136 };
0137
0138 rtc@68 {
0139 compatible = "dallas,ds1339";
0140 reg = <0x68>;
0141 };
0142 };
0143
0144 sdhci@2e000 {
0145 compatible = "fsl,mpc8377-esdhc", "fsl,esdhc";
0146 reg = <0x2e000 0x1000>;
0147 interrupts = <42 0x8>;
0148 interrupt-parent = <&ipic>;
0149 sdhci,wp-inverted;
0150 clock-frequency = <133333333>;
0151 };
0152 };
0153
0154 i2c@3100 {
0155 #address-cells = <1>;
0156 #size-cells = <0>;
0157 cell-index = <1>;
0158 compatible = "fsl-i2c";
0159 reg = <0x3100 0x100>;
0160 interrupts = <15 0x8>;
0161 interrupt-parent = <&ipic>;
0162 dfsrr;
0163 };
0164
0165 spi@7000 {
0166 cell-index = <0>;
0167 compatible = "fsl,spi";
0168 reg = <0x7000 0x1000>;
0169 interrupts = <16 0x8>;
0170 interrupt-parent = <&ipic>;
0171 mode = "cpu";
0172 };
0173
0174 dma@82a8 {
0175 #address-cells = <1>;
0176 #size-cells = <1>;
0177 compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
0178 reg = <0x82a8 4>;
0179 ranges = <0 0x8100 0x1a8>;
0180 interrupt-parent = <&ipic>;
0181 interrupts = <71 8>;
0182 cell-index = <0>;
0183 dma-channel@0 {
0184 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
0185 reg = <0 0x80>;
0186 cell-index = <0>;
0187 interrupt-parent = <&ipic>;
0188 interrupts = <71 8>;
0189 };
0190 dma-channel@80 {
0191 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
0192 reg = <0x80 0x80>;
0193 cell-index = <1>;
0194 interrupt-parent = <&ipic>;
0195 interrupts = <71 8>;
0196 };
0197 dma-channel@100 {
0198 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
0199 reg = <0x100 0x80>;
0200 cell-index = <2>;
0201 interrupt-parent = <&ipic>;
0202 interrupts = <71 8>;
0203 };
0204 dma-channel@180 {
0205 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
0206 reg = <0x180 0x28>;
0207 cell-index = <3>;
0208 interrupt-parent = <&ipic>;
0209 interrupts = <71 8>;
0210 };
0211 };
0212
0213 usb@23000 {
0214 compatible = "fsl-usb2-dr";
0215 reg = <0x23000 0x1000>;
0216 #address-cells = <1>;
0217 #size-cells = <0>;
0218 interrupt-parent = <&ipic>;
0219 interrupts = <38 0x8>;
0220 phy_type = "ulpi";
0221 sleep = <&pmc 0x00c00000>;
0222 };
0223
0224 enet0: ethernet@24000 {
0225 #address-cells = <1>;
0226 #size-cells = <1>;
0227 cell-index = <0>;
0228 device_type = "network";
0229 model = "eTSEC";
0230 compatible = "gianfar";
0231 reg = <0x24000 0x1000>;
0232 ranges = <0x0 0x24000 0x1000>;
0233 local-mac-address = [ 00 00 00 00 00 00 ];
0234 interrupts = <32 0x8 33 0x8 34 0x8>;
0235 phy-connection-type = "mii";
0236 interrupt-parent = <&ipic>;
0237 tbi-handle = <&tbi0>;
0238 phy-handle = <&phy2>;
0239 sleep = <&pmc 0xc0000000>;
0240 fsl,magic-packet;
0241
0242 mdio@520 {
0243 #address-cells = <1>;
0244 #size-cells = <0>;
0245 compatible = "fsl,gianfar-mdio";
0246 reg = <0x520 0x20>;
0247
0248 phy2: ethernet-phy@2 {
0249 interrupt-parent = <&ipic>;
0250 interrupts = <17 0x8>;
0251 reg = <0x2>;
0252 };
0253
0254 phy3: ethernet-phy@3 {
0255 interrupt-parent = <&ipic>;
0256 interrupts = <18 0x8>;
0257 reg = <0x3>;
0258 };
0259
0260 tbi0: tbi-phy@11 {
0261 reg = <0x11>;
0262 device_type = "tbi-phy";
0263 };
0264 };
0265 };
0266
0267 enet1: ethernet@25000 {
0268 #address-cells = <1>;
0269 #size-cells = <1>;
0270 cell-index = <1>;
0271 device_type = "network";
0272 model = "eTSEC";
0273 compatible = "gianfar";
0274 reg = <0x25000 0x1000>;
0275 ranges = <0x0 0x25000 0x1000>;
0276 local-mac-address = [ 00 00 00 00 00 00 ];
0277 interrupts = <35 0x8 36 0x8 37 0x8>;
0278 phy-connection-type = "mii";
0279 interrupt-parent = <&ipic>;
0280 phy-handle = <&phy3>;
0281 tbi-handle = <&tbi1>;
0282 sleep = <&pmc 0x30000000>;
0283 fsl,magic-packet;
0284
0285 mdio@520 {
0286 #address-cells = <1>;
0287 #size-cells = <0>;
0288 compatible = "fsl,gianfar-tbi";
0289 reg = <0x520 0x20>;
0290
0291 tbi1: tbi-phy@11 {
0292 reg = <0x11>;
0293 device_type = "tbi-phy";
0294 };
0295 };
0296 };
0297
0298 serial0: serial@4500 {
0299 cell-index = <0>;
0300 device_type = "serial";
0301 compatible = "fsl,ns16550", "ns16550";
0302 reg = <0x4500 0x100>;
0303 clock-frequency = <0>;
0304 interrupts = <9 0x8>;
0305 interrupt-parent = <&ipic>;
0306 };
0307
0308 serial1: serial@4600 {
0309 cell-index = <1>;
0310 device_type = "serial";
0311 compatible = "fsl,ns16550", "ns16550";
0312 reg = <0x4600 0x100>;
0313 clock-frequency = <0>;
0314 interrupts = <10 0x8>;
0315 interrupt-parent = <&ipic>;
0316 };
0317
0318 crypto@30000 {
0319 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
0320 "fsl,sec2.1", "fsl,sec2.0";
0321 reg = <0x30000 0x10000>;
0322 interrupts = <11 0x8>;
0323 interrupt-parent = <&ipic>;
0324 fsl,num-channels = <4>;
0325 fsl,channel-fifo-len = <24>;
0326 fsl,exec-units-mask = <0x9fe>;
0327 fsl,descriptor-types-mask = <0x3ab0ebf>;
0328 sleep = <&pmc 0x03000000>;
0329 };
0330
0331 sata@18000 {
0332 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
0333 reg = <0x18000 0x1000>;
0334 interrupts = <44 0x8>;
0335 interrupt-parent = <&ipic>;
0336 sleep = <&pmc 0x000000c0>;
0337 };
0338
0339 sata@19000 {
0340 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
0341 reg = <0x19000 0x1000>;
0342 interrupts = <45 0x8>;
0343 interrupt-parent = <&ipic>;
0344 sleep = <&pmc 0x00000030>;
0345 };
0346
0347 /* IPIC
0348 * interrupts cell = <intr #, sense>
0349 * sense values match linux IORESOURCE_IRQ_* defines:
0350 * sense == 8: Level, low assertion
0351 * sense == 2: Edge, high-to-low change
0352 */
0353 ipic: interrupt-controller@700 {
0354 compatible = "fsl,ipic";
0355 interrupt-controller;
0356 #address-cells = <0>;
0357 #interrupt-cells = <2>;
0358 reg = <0x700 0x100>;
0359 };
0360
0361 pmc: power@b00 {
0362 compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
0363 reg = <0xb00 0x100 0xa00 0x100>;
0364 interrupts = <80 0x8>;
0365 interrupt-parent = <&ipic>;
0366 };
0367 };
0368
0369 pci0: pci@e0008500 {
0370 interrupt-map-mask = <0xf800 0 0 7>;
0371 interrupt-map = <
0372 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
0373
0374 /* IDSEL AD14 IRQ6 inta */
0375 0x7000 0x0 0x0 0x1 &ipic 22 0x8
0376
0377 /* IDSEL AD15 IRQ5 inta */
0378 0x7800 0x0 0x0 0x1 &ipic 21 0x8>;
0379 interrupt-parent = <&ipic>;
0380 interrupts = <66 0x8>;
0381 bus-range = <0 0>;
0382 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0383 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0384 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
0385 sleep = <&pmc 0x00010000>;
0386 clock-frequency = <66666666>;
0387 #interrupt-cells = <1>;
0388 #size-cells = <2>;
0389 #address-cells = <3>;
0390 reg = <0xe0008500 0x100 /* internal registers */
0391 0xe0008300 0x8>; /* config space access registers */
0392 compatible = "fsl,mpc8349-pci";
0393 device_type = "pci";
0394 };
0395
0396 pci1: pcie@e0009000 {
0397 #address-cells = <3>;
0398 #size-cells = <2>;
0399 #interrupt-cells = <1>;
0400 device_type = "pci";
0401 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
0402 reg = <0xe0009000 0x00001000>;
0403 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
0404 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
0405 bus-range = <0 255>;
0406 interrupt-map-mask = <0xf800 0 0 7>;
0407 interrupt-map = <0 0 0 1 &ipic 1 8
0408 0 0 0 2 &ipic 1 8
0409 0 0 0 3 &ipic 1 8
0410 0 0 0 4 &ipic 1 8>;
0411 sleep = <&pmc 0x00300000>;
0412 clock-frequency = <0>;
0413
0414 pcie@0 {
0415 #address-cells = <3>;
0416 #size-cells = <2>;
0417 device_type = "pci";
0418 reg = <0 0 0 0 0>;
0419 ranges = <0x02000000 0 0xa8000000
0420 0x02000000 0 0xa8000000
0421 0 0x10000000
0422 0x01000000 0 0x00000000
0423 0x01000000 0 0x00000000
0424 0 0x00800000>;
0425 };
0426 };
0427
0428 pci2: pcie@e000a000 {
0429 #address-cells = <3>;
0430 #size-cells = <2>;
0431 #interrupt-cells = <1>;
0432 device_type = "pci";
0433 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
0434 reg = <0xe000a000 0x00001000>;
0435 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
0436 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
0437 bus-range = <0 255>;
0438 interrupt-map-mask = <0xf800 0 0 7>;
0439 interrupt-map = <0 0 0 1 &ipic 2 8
0440 0 0 0 2 &ipic 2 8
0441 0 0 0 3 &ipic 2 8
0442 0 0 0 4 &ipic 2 8>;
0443 sleep = <&pmc 0x000c0000>;
0444 clock-frequency = <0>;
0445
0446 pcie@0 {
0447 #address-cells = <3>;
0448 #size-cells = <2>;
0449 device_type = "pci";
0450 reg = <0 0 0 0 0>;
0451 ranges = <0x02000000 0 0xc8000000
0452 0x02000000 0 0xc8000000
0453 0 0x10000000
0454 0x01000000 0 0x00000000
0455 0x01000000 0 0x00000000
0456 0 0x00800000>;
0457 };
0458 };
0459 };
