0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * MPC8377E RDB Device Tree Source
0004 *
0005 * Copyright 2007, 2008 Freescale Semiconductor Inc.
0006 */
0007
0008 /dts-v1/;
0009
0010 / {
0011 compatible = "fsl,mpc8377rdb";
0012 #address-cells = <1>;
0013 #size-cells = <1>;
0014
0015 aliases {
0016 ethernet0 = &enet0;
0017 ethernet1 = &enet1;
0018 serial0 = &serial0;
0019 serial1 = &serial1;
0020 pci0 = &pci0;
0021 pci1 = &pci1;
0022 pci2 = &pci2;
0023 };
0024
0025 cpus {
0026 #address-cells = <1>;
0027 #size-cells = <0>;
0028
0029 PowerPC,8377@0 {
0030 device_type = "cpu";
0031 reg = <0x0>;
0032 d-cache-line-size = <32>;
0033 i-cache-line-size = <32>;
0034 d-cache-size = <32768>;
0035 i-cache-size = <32768>;
0036 timebase-frequency = <0>;
0037 bus-frequency = <0>;
0038 clock-frequency = <0>;
0039 };
0040 };
0041
0042 memory {
0043 device_type = "memory";
0044 reg = <0x00000000 0x10000000>; // 256MB at 0
0045 };
0046
0047 localbus@e0005000 {
0048 #address-cells = <2>;
0049 #size-cells = <1>;
0050 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
0051 reg = <0xe0005000 0x1000>;
0052 interrupts = <77 0x8>;
0053 interrupt-parent = <&ipic>;
0054
0055 // CS0 and CS1 are swapped when
0056 // booting from nand, but the
0057 // addresses are the same.
0058 ranges = <0x0 0x0 0xfe000000 0x00800000
0059 0x1 0x0 0xe0600000 0x00008000
0060 0x2 0x0 0xf0000000 0x00020000
0061 0x3 0x0 0xfa000000 0x00008000>;
0062
0063 flash@0,0 {
0064 #address-cells = <1>;
0065 #size-cells = <1>;
0066 compatible = "cfi-flash";
0067 reg = <0x0 0x0 0x800000>;
0068 bank-width = <2>;
0069 device-width = <1>;
0070 };
0071
0072 nand@1,0 {
0073 #address-cells = <1>;
0074 #size-cells = <1>;
0075 compatible = "fsl,mpc8377-fcm-nand",
0076 "fsl,elbc-fcm-nand";
0077 reg = <0x1 0x0 0x8000>;
0078
0079 u-boot@0 {
0080 reg = <0x0 0x100000>;
0081 read-only;
0082 };
0083
0084 kernel@100000 {
0085 reg = <0x100000 0x300000>;
0086 };
0087 fs@400000 {
0088 reg = <0x400000 0x1c00000>;
0089 };
0090 };
0091 };
0092
0093 immr@e0000000 {
0094 #address-cells = <1>;
0095 #size-cells = <1>;
0096 device_type = "soc";
0097 compatible = "simple-bus";
0098 ranges = <0x0 0xe0000000 0x00100000>;
0099 reg = <0xe0000000 0x00000200>;
0100 bus-frequency = <0>;
0101
0102 wdt@200 {
0103 device_type = "watchdog";
0104 compatible = "mpc83xx_wdt";
0105 reg = <0x200 0x100>;
0106 };
0107
0108 gpio1: gpio-controller@c00 {
0109 #gpio-cells = <2>;
0110 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
0111 reg = <0xc00 0x100>;
0112 interrupts = <74 0x8>;
0113 interrupt-parent = <&ipic>;
0114 gpio-controller;
0115 };
0116
0117 gpio2: gpio-controller@d00 {
0118 #gpio-cells = <2>;
0119 compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio";
0120 reg = <0xd00 0x100>;
0121 interrupts = <75 0x8>;
0122 interrupt-parent = <&ipic>;
0123 gpio-controller;
0124 };
0125
0126 sleep-nexus {
0127 #address-cells = <1>;
0128 #size-cells = <1>;
0129 compatible = "simple-bus";
0130 sleep = <&pmc 0x0c000000>;
0131 ranges;
0132
0133 i2c@3000 {
0134 #address-cells = <1>;
0135 #size-cells = <0>;
0136 cell-index = <0>;
0137 compatible = "fsl-i2c";
0138 reg = <0x3000 0x100>;
0139 interrupts = <14 0x8>;
0140 interrupt-parent = <&ipic>;
0141 dfsrr;
0142
0143 dtt@48 {
0144 compatible = "national,lm75";
0145 reg = <0x48>;
0146 };
0147
0148 at24@50 {
0149 compatible = "atmel,24c256";
0150 reg = <0x50>;
0151 };
0152
0153 rtc@68 {
0154 compatible = "dallas,ds1339";
0155 reg = <0x68>;
0156 };
0157
0158 mcu_pio: mcu@a {
0159 #gpio-cells = <2>;
0160 compatible = "fsl,mc9s08qg8-mpc8377erdb",
0161 "fsl,mcu-mpc8349emitx";
0162 reg = <0x0a>;
0163 gpio-controller;
0164 };
0165 };
0166
0167 sdhci@2e000 {
0168 compatible = "fsl,mpc8377-esdhc", "fsl,esdhc";
0169 reg = <0x2e000 0x1000>;
0170 interrupts = <42 0x8>;
0171 interrupt-parent = <&ipic>;
0172 sdhci,wp-inverted;
0173 /* Filled in by U-Boot */
0174 clock-frequency = <111111111>;
0175 };
0176 };
0177
0178 i2c@3100 {
0179 #address-cells = <1>;
0180 #size-cells = <0>;
0181 cell-index = <1>;
0182 compatible = "fsl-i2c";
0183 reg = <0x3100 0x100>;
0184 interrupts = <15 0x8>;
0185 interrupt-parent = <&ipic>;
0186 dfsrr;
0187 };
0188
0189 spi@7000 {
0190 cell-index = <0>;
0191 compatible = "fsl,spi";
0192 reg = <0x7000 0x1000>;
0193 interrupts = <16 0x8>;
0194 interrupt-parent = <&ipic>;
0195 mode = "cpu";
0196 };
0197
0198 dma@82a8 {
0199 #address-cells = <1>;
0200 #size-cells = <1>;
0201 compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
0202 reg = <0x82a8 4>;
0203 ranges = <0 0x8100 0x1a8>;
0204 interrupt-parent = <&ipic>;
0205 interrupts = <71 8>;
0206 cell-index = <0>;
0207 dma-channel@0 {
0208 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
0209 reg = <0 0x80>;
0210 cell-index = <0>;
0211 interrupt-parent = <&ipic>;
0212 interrupts = <71 8>;
0213 };
0214 dma-channel@80 {
0215 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
0216 reg = <0x80 0x80>;
0217 cell-index = <1>;
0218 interrupt-parent = <&ipic>;
0219 interrupts = <71 8>;
0220 };
0221 dma-channel@100 {
0222 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
0223 reg = <0x100 0x80>;
0224 cell-index = <2>;
0225 interrupt-parent = <&ipic>;
0226 interrupts = <71 8>;
0227 };
0228 dma-channel@180 {
0229 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
0230 reg = <0x180 0x28>;
0231 cell-index = <3>;
0232 interrupt-parent = <&ipic>;
0233 interrupts = <71 8>;
0234 };
0235 };
0236
0237 usb@23000 {
0238 compatible = "fsl-usb2-dr";
0239 reg = <0x23000 0x1000>;
0240 #address-cells = <1>;
0241 #size-cells = <0>;
0242 interrupt-parent = <&ipic>;
0243 interrupts = <38 0x8>;
0244 phy_type = "ulpi";
0245 sleep = <&pmc 0x00c00000>;
0246 };
0247
0248 enet0: ethernet@24000 {
0249 #address-cells = <1>;
0250 #size-cells = <1>;
0251 cell-index = <0>;
0252 device_type = "network";
0253 model = "eTSEC";
0254 compatible = "gianfar";
0255 reg = <0x24000 0x1000>;
0256 ranges = <0x0 0x24000 0x1000>;
0257 local-mac-address = [ 00 00 00 00 00 00 ];
0258 interrupts = <32 0x8 33 0x8 34 0x8>;
0259 phy-connection-type = "mii";
0260 interrupt-parent = <&ipic>;
0261 tbi-handle = <&tbi0>;
0262 phy-handle = <&phy2>;
0263 sleep = <&pmc 0xc0000000>;
0264 fsl,magic-packet;
0265
0266 mdio@520 {
0267 #address-cells = <1>;
0268 #size-cells = <0>;
0269 compatible = "fsl,gianfar-mdio";
0270 reg = <0x520 0x20>;
0271
0272 phy2: ethernet-phy@2 {
0273 interrupt-parent = <&ipic>;
0274 interrupts = <17 0x8>;
0275 reg = <0x2>;
0276 };
0277
0278 tbi0: tbi-phy@11 {
0279 reg = <0x11>;
0280 device_type = "tbi-phy";
0281 };
0282 };
0283 };
0284
0285 enet1: ethernet@25000 {
0286 #address-cells = <1>;
0287 #size-cells = <1>;
0288 cell-index = <1>;
0289 device_type = "network";
0290 model = "eTSEC";
0291 compatible = "gianfar";
0292 reg = <0x25000 0x1000>;
0293 ranges = <0x0 0x25000 0x1000>;
0294 local-mac-address = [ 00 00 00 00 00 00 ];
0295 interrupts = <35 0x8 36 0x8 37 0x8>;
0296 phy-connection-type = "mii";
0297 interrupt-parent = <&ipic>;
0298 fixed-link = <1 1 1000 0 0>;
0299 tbi-handle = <&tbi1>;
0300 sleep = <&pmc 0x30000000>;
0301 fsl,magic-packet;
0302
0303 mdio@520 {
0304 #address-cells = <1>;
0305 #size-cells = <0>;
0306 compatible = "fsl,gianfar-tbi";
0307 reg = <0x520 0x20>;
0308
0309 tbi1: tbi-phy@11 {
0310 reg = <0x11>;
0311 device_type = "tbi-phy";
0312 };
0313 };
0314 };
0315
0316 serial0: serial@4500 {
0317 cell-index = <0>;
0318 device_type = "serial";
0319 compatible = "fsl,ns16550", "ns16550";
0320 reg = <0x4500 0x100>;
0321 clock-frequency = <0>;
0322 interrupts = <9 0x8>;
0323 interrupt-parent = <&ipic>;
0324 };
0325
0326 serial1: serial@4600 {
0327 cell-index = <1>;
0328 device_type = "serial";
0329 compatible = "fsl,ns16550", "ns16550";
0330 reg = <0x4600 0x100>;
0331 clock-frequency = <0>;
0332 interrupts = <10 0x8>;
0333 interrupt-parent = <&ipic>;
0334 };
0335
0336 crypto@30000 {
0337 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
0338 "fsl,sec2.1", "fsl,sec2.0";
0339 reg = <0x30000 0x10000>;
0340 interrupts = <11 0x8>;
0341 interrupt-parent = <&ipic>;
0342 fsl,num-channels = <4>;
0343 fsl,channel-fifo-len = <24>;
0344 fsl,exec-units-mask = <0x9fe>;
0345 fsl,descriptor-types-mask = <0x3ab0ebf>;
0346 sleep = <&pmc 0x03000000>;
0347 };
0348
0349 sata@18000 {
0350 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
0351 reg = <0x18000 0x1000>;
0352 interrupts = <44 0x8>;
0353 interrupt-parent = <&ipic>;
0354 sleep = <&pmc 0x000000c0>;
0355 };
0356
0357 sata@19000 {
0358 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
0359 reg = <0x19000 0x1000>;
0360 interrupts = <45 0x8>;
0361 interrupt-parent = <&ipic>;
0362 sleep = <&pmc 0x00000030>;
0363 };
0364
0365 /* IPIC
0366 * interrupts cell = <intr #, sense>
0367 * sense values match linux IORESOURCE_IRQ_* defines:
0368 * sense == 8: Level, low assertion
0369 * sense == 2: Edge, high-to-low change
0370 */
0371 ipic: interrupt-controller@700 {
0372 compatible = "fsl,ipic";
0373 interrupt-controller;
0374 #address-cells = <0>;
0375 #interrupt-cells = <2>;
0376 reg = <0x700 0x100>;
0377 };
0378
0379 pmc: power@b00 {
0380 compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
0381 reg = <0xb00 0x100 0xa00 0x100>;
0382 interrupts = <80 0x8>;
0383 interrupt-parent = <&ipic>;
0384 };
0385 };
0386
0387 pci0: pci@e0008500 {
0388 interrupt-map-mask = <0xf800 0 0 7>;
0389 interrupt-map = <
0390 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
0391
0392 /* IDSEL AD14 IRQ6 inta */
0393 0x7000 0x0 0x0 0x1 &ipic 22 0x8
0394
0395 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
0396 0x7800 0x0 0x0 0x1 &ipic 21 0x8
0397 0x7800 0x0 0x0 0x2 &ipic 22 0x8
0398 0x7800 0x0 0x0 0x4 &ipic 23 0x8
0399
0400 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
0401 0xE000 0x0 0x0 0x1 &ipic 23 0x8
0402 0xE000 0x0 0x0 0x2 &ipic 21 0x8
0403 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
0404 interrupt-parent = <&ipic>;
0405 interrupts = <66 0x8>;
0406 bus-range = <0 0>;
0407 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0408 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0409 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
0410 sleep = <&pmc 0x00010000>;
0411 clock-frequency = <66666666>;
0412 #interrupt-cells = <1>;
0413 #size-cells = <2>;
0414 #address-cells = <3>;
0415 reg = <0xe0008500 0x100 /* internal registers */
0416 0xe0008300 0x8>; /* config space access registers */
0417 compatible = "fsl,mpc8349-pci";
0418 device_type = "pci";
0419 };
0420
0421 pci1: pcie@e0009000 {
0422 #address-cells = <3>;
0423 #size-cells = <2>;
0424 #interrupt-cells = <1>;
0425 device_type = "pci";
0426 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
0427 reg = <0xe0009000 0x00001000>;
0428 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
0429 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
0430 bus-range = <0 255>;
0431 interrupt-map-mask = <0xf800 0 0 7>;
0432 interrupt-map = <0 0 0 1 &ipic 1 8
0433 0 0 0 2 &ipic 1 8
0434 0 0 0 3 &ipic 1 8
0435 0 0 0 4 &ipic 1 8>;
0436 sleep = <&pmc 0x00300000>;
0437 clock-frequency = <0>;
0438
0439 pcie@0 {
0440 #address-cells = <3>;
0441 #size-cells = <2>;
0442 device_type = "pci";
0443 reg = <0 0 0 0 0>;
0444 ranges = <0x02000000 0 0xa8000000
0445 0x02000000 0 0xa8000000
0446 0 0x10000000
0447 0x01000000 0 0x00000000
0448 0x01000000 0 0x00000000
0449 0 0x00800000>;
0450 };
0451 };
0452
0453 pci2: pcie@e000a000 {
0454 #address-cells = <3>;
0455 #size-cells = <2>;
0456 #interrupt-cells = <1>;
0457 device_type = "pci";
0458 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
0459 reg = <0xe000a000 0x00001000>;
0460 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
0461 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
0462 bus-range = <0 255>;
0463 interrupt-map-mask = <0xf800 0 0 7>;
0464 interrupt-map = <0 0 0 1 &ipic 2 8
0465 0 0 0 2 &ipic 2 8
0466 0 0 0 3 &ipic 2 8
0467 0 0 0 4 &ipic 2 8>;
0468 sleep = <&pmc 0x000c0000>;
0469 clock-frequency = <0>;
0470
0471 pcie@0 {
0472 #address-cells = <3>;
0473 #size-cells = <2>;
0474 device_type = "pci";
0475 reg = <0 0 0 0 0>;
0476 ranges = <0x02000000 0 0xc8000000
0477 0x02000000 0 0xc8000000
0478 0 0x10000000
0479 0x01000000 0 0x00000000
0480 0x01000000 0 0x00000000
0481 0 0x00800000>;
0482 };
0483 };
0484
0485 leds {
0486 compatible = "gpio-leds";
0487
0488 pwr {
0489 gpios = <&mcu_pio 0 0>;
0490 default-state = "on";
0491 };
0492
0493 hdd {
0494 gpios = <&mcu_pio 1 0>;
0495 linux,default-trigger = "disk-activity";
0496 };
0497 };
0498 };
