0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * MPC8377E MDS Device Tree Source
0004 *
0005 * Copyright 2007 Freescale Semiconductor Inc.
0006 */
0007
0008 /dts-v1/;
0009
0010 / {
0011 model = "fsl,mpc8377emds";
0012 compatible = "fsl,mpc8377emds","fsl,mpc837xmds";
0013 #address-cells = <1>;
0014 #size-cells = <1>;
0015
0016 aliases {
0017 ethernet0 = &enet0;
0018 ethernet1 = &enet1;
0019 serial0 = &serial0;
0020 serial1 = &serial1;
0021 pci0 = &pci0;
0022 pci1 = &pci1;
0023 pci2 = &pci2;
0024 };
0025
0026 cpus {
0027 #address-cells = <1>;
0028 #size-cells = <0>;
0029
0030 PowerPC,8377@0 {
0031 device_type = "cpu";
0032 reg = <0x0>;
0033 d-cache-line-size = <32>;
0034 i-cache-line-size = <32>;
0035 d-cache-size = <32768>;
0036 i-cache-size = <32768>;
0037 timebase-frequency = <0>;
0038 bus-frequency = <0>;
0039 clock-frequency = <0>;
0040 };
0041 };
0042
0043 memory {
0044 device_type = "memory";
0045 reg = <0x00000000 0x20000000>; // 512MB at 0
0046 };
0047
0048 localbus@e0005000 {
0049 #address-cells = <2>;
0050 #size-cells = <1>;
0051 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
0052 reg = <0xe0005000 0x1000>;
0053 interrupts = <77 0x8>;
0054 interrupt-parent = <&ipic>;
0055
0056 // booting from NOR flash
0057 ranges = <0 0x0 0xfe000000 0x02000000
0058 1 0x0 0xf8000000 0x00008000
0059 3 0x0 0xe0600000 0x00008000>;
0060
0061 flash@0,0 {
0062 #address-cells = <1>;
0063 #size-cells = <1>;
0064 compatible = "cfi-flash";
0065 reg = <0 0x0 0x2000000>;
0066 bank-width = <2>;
0067 device-width = <1>;
0068
0069 u-boot@0 {
0070 reg = <0x0 0x100000>;
0071 read-only;
0072 };
0073
0074 fs@100000 {
0075 reg = <0x100000 0x800000>;
0076 };
0077
0078 kernel@1d00000 {
0079 reg = <0x1d00000 0x200000>;
0080 };
0081
0082 dtb@1f00000 {
0083 reg = <0x1f00000 0x100000>;
0084 };
0085 };
0086
0087 bcsr@1,0 {
0088 reg = <1 0x0 0x8000>;
0089 compatible = "fsl,mpc837xmds-bcsr";
0090 };
0091
0092 nand@3,0 {
0093 #address-cells = <1>;
0094 #size-cells = <1>;
0095 compatible = "fsl,mpc8377-fcm-nand",
0096 "fsl,elbc-fcm-nand";
0097 reg = <3 0x0 0x8000>;
0098
0099 u-boot@0 {
0100 reg = <0x0 0x100000>;
0101 read-only;
0102 };
0103
0104 kernel@100000 {
0105 reg = <0x100000 0x300000>;
0106 };
0107
0108 fs@400000 {
0109 reg = <0x400000 0x1c00000>;
0110 };
0111 };
0112 };
0113
0114 soc@e0000000 {
0115 #address-cells = <1>;
0116 #size-cells = <1>;
0117 device_type = "soc";
0118 compatible = "simple-bus";
0119 ranges = <0x0 0xe0000000 0x00100000>;
0120 reg = <0xe0000000 0x00000200>;
0121 bus-frequency = <0>;
0122
0123 wdt@200 {
0124 compatible = "mpc83xx_wdt";
0125 reg = <0x200 0x100>;
0126 };
0127
0128 sleep-nexus {
0129 #address-cells = <1>;
0130 #size-cells = <1>;
0131 compatible = "simple-bus";
0132 sleep = <&pmc 0x0c000000>;
0133 ranges;
0134
0135 i2c@3000 {
0136 #address-cells = <1>;
0137 #size-cells = <0>;
0138 cell-index = <0>;
0139 compatible = "fsl-i2c";
0140 reg = <0x3000 0x100>;
0141 interrupts = <14 0x8>;
0142 interrupt-parent = <&ipic>;
0143 dfsrr;
0144
0145 rtc@68 {
0146 compatible = "dallas,ds1374";
0147 reg = <0x68>;
0148 interrupts = <19 0x8>;
0149 interrupt-parent = <&ipic>;
0150 };
0151 };
0152
0153 sdhci@2e000 {
0154 compatible = "fsl,mpc8377-esdhc", "fsl,esdhc";
0155 reg = <0x2e000 0x1000>;
0156 interrupts = <42 0x8>;
0157 interrupt-parent = <&ipic>;
0158 sdhci,wp-inverted;
0159 /* Filled in by U-Boot */
0160 clock-frequency = <0>;
0161 };
0162 };
0163
0164 i2c@3100 {
0165 #address-cells = <1>;
0166 #size-cells = <0>;
0167 cell-index = <1>;
0168 compatible = "fsl-i2c";
0169 reg = <0x3100 0x100>;
0170 interrupts = <15 0x8>;
0171 interrupt-parent = <&ipic>;
0172 dfsrr;
0173 };
0174
0175 spi@7000 {
0176 cell-index = <0>;
0177 compatible = "fsl,spi";
0178 reg = <0x7000 0x1000>;
0179 interrupts = <16 0x8>;
0180 interrupt-parent = <&ipic>;
0181 mode = "cpu";
0182 };
0183
0184 usb@23000 {
0185 compatible = "fsl-usb2-dr";
0186 reg = <0x23000 0x1000>;
0187 #address-cells = <1>;
0188 #size-cells = <0>;
0189 interrupt-parent = <&ipic>;
0190 interrupts = <38 0x8>;
0191 dr_mode = "host";
0192 phy_type = "ulpi";
0193 sleep = <&pmc 0x00c00000>;
0194 };
0195
0196 enet0: ethernet@24000 {
0197 #address-cells = <1>;
0198 #size-cells = <1>;
0199 cell-index = <0>;
0200 device_type = "network";
0201 model = "eTSEC";
0202 compatible = "gianfar";
0203 reg = <0x24000 0x1000>;
0204 ranges = <0x0 0x24000 0x1000>;
0205 local-mac-address = [ 00 00 00 00 00 00 ];
0206 interrupts = <32 0x8 33 0x8 34 0x8>;
0207 phy-connection-type = "mii";
0208 interrupt-parent = <&ipic>;
0209 tbi-handle = <&tbi0>;
0210 phy-handle = <&phy2>;
0211 sleep = <&pmc 0xc0000000>;
0212 fsl,magic-packet;
0213
0214 mdio@520 {
0215 #address-cells = <1>;
0216 #size-cells = <0>;
0217 compatible = "fsl,gianfar-mdio";
0218 reg = <0x520 0x20>;
0219
0220 phy2: ethernet-phy@2 {
0221 interrupt-parent = <&ipic>;
0222 interrupts = <17 0x8>;
0223 reg = <0x2>;
0224 };
0225
0226 phy3: ethernet-phy@3 {
0227 interrupt-parent = <&ipic>;
0228 interrupts = <18 0x8>;
0229 reg = <0x3>;
0230 };
0231
0232 tbi0: tbi-phy@11 {
0233 reg = <0x11>;
0234 device_type = "tbi-phy";
0235 };
0236 };
0237 };
0238
0239 enet1: ethernet@25000 {
0240 #address-cells = <1>;
0241 #size-cells = <1>;
0242 cell-index = <1>;
0243 device_type = "network";
0244 model = "eTSEC";
0245 compatible = "gianfar";
0246 reg = <0x25000 0x1000>;
0247 ranges = <0x0 0x25000 0x1000>;
0248 local-mac-address = [ 00 00 00 00 00 00 ];
0249 interrupts = <35 0x8 36 0x8 37 0x8>;
0250 phy-connection-type = "mii";
0251 interrupt-parent = <&ipic>;
0252 tbi-handle = <&tbi1>;
0253 phy-handle = <&phy3>;
0254 sleep = <&pmc 0x30000000>;
0255 fsl,magic-packet;
0256
0257 mdio@520 {
0258 #address-cells = <1>;
0259 #size-cells = <0>;
0260 compatible = "fsl,gianfar-tbi";
0261 reg = <0x520 0x20>;
0262
0263 tbi1: tbi-phy@11 {
0264 reg = <0x11>;
0265 device_type = "tbi-phy";
0266 };
0267 };
0268 };
0269
0270 serial0: serial@4500 {
0271 cell-index = <0>;
0272 device_type = "serial";
0273 compatible = "fsl,ns16550", "ns16550";
0274 reg = <0x4500 0x100>;
0275 clock-frequency = <0>;
0276 interrupts = <9 0x8>;
0277 interrupt-parent = <&ipic>;
0278 };
0279
0280 serial1: serial@4600 {
0281 cell-index = <1>;
0282 device_type = "serial";
0283 compatible = "fsl,ns16550", "ns16550";
0284 reg = <0x4600 0x100>;
0285 clock-frequency = <0>;
0286 interrupts = <10 0x8>;
0287 interrupt-parent = <&ipic>;
0288 };
0289
0290 dma@82a8 {
0291 #address-cells = <1>;
0292 #size-cells = <1>;
0293 compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
0294 reg = <0x82a8 4>;
0295 ranges = <0 0x8100 0x1a8>;
0296 interrupt-parent = <&ipic>;
0297 interrupts = <0x47 8>;
0298 cell-index = <0>;
0299 dma-channel@0 {
0300 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
0301 reg = <0 0x80>;
0302 cell-index = <0>;
0303 interrupt-parent = <&ipic>;
0304 interrupts = <0x47 8>;
0305 };
0306 dma-channel@80 {
0307 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
0308 reg = <0x80 0x80>;
0309 cell-index = <1>;
0310 interrupt-parent = <&ipic>;
0311 interrupts = <0x47 8>;
0312 };
0313 dma-channel@100 {
0314 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
0315 reg = <0x100 0x80>;
0316 cell-index = <2>;
0317 interrupt-parent = <&ipic>;
0318 interrupts = <0x47 8>;
0319 };
0320 dma-channel@180 {
0321 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
0322 reg = <0x180 0x28>;
0323 cell-index = <3>;
0324 interrupt-parent = <&ipic>;
0325 interrupts = <0x47 8>;
0326 };
0327 };
0328
0329 crypto@30000 {
0330 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
0331 "fsl,sec2.1", "fsl,sec2.0";
0332 reg = <0x30000 0x10000>;
0333 interrupts = <11 0x8>;
0334 interrupt-parent = <&ipic>;
0335 fsl,num-channels = <4>;
0336 fsl,channel-fifo-len = <24>;
0337 fsl,exec-units-mask = <0x9fe>;
0338 fsl,descriptor-types-mask = <0x3ab0ebf>;
0339 sleep = <&pmc 0x03000000>;
0340 };
0341
0342 sata@18000 {
0343 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
0344 reg = <0x18000 0x1000>;
0345 interrupts = <44 0x8>;
0346 interrupt-parent = <&ipic>;
0347 sleep = <&pmc 0x000000c0>;
0348 };
0349
0350 sata@19000 {
0351 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
0352 reg = <0x19000 0x1000>;
0353 interrupts = <45 0x8>;
0354 interrupt-parent = <&ipic>;
0355 sleep = <&pmc 0x00000030>;
0356 };
0357
0358 /* IPIC
0359 * interrupts cell = <intr #, sense>
0360 * sense values match linux IORESOURCE_IRQ_* defines:
0361 * sense == 8: Level, low assertion
0362 * sense == 2: Edge, high-to-low change
0363 */
0364 ipic: pic@700 {
0365 compatible = "fsl,ipic";
0366 interrupt-controller;
0367 #address-cells = <0>;
0368 #interrupt-cells = <2>;
0369 reg = <0x700 0x100>;
0370 };
0371
0372 pmc: power@b00 {
0373 compatible = "fsl,mpc8377-pmc", "fsl,mpc8349-pmc";
0374 reg = <0xb00 0x100 0xa00 0x100>;
0375 interrupts = <80 0x8>;
0376 interrupt-parent = <&ipic>;
0377 };
0378 };
0379
0380 pci0: pci@e0008500 {
0381 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0382 interrupt-map = <
0383
0384 /* IDSEL 0x11 */
0385 0x8800 0x0 0x0 0x1 &ipic 20 0x8
0386 0x8800 0x0 0x0 0x2 &ipic 21 0x8
0387 0x8800 0x0 0x0 0x3 &ipic 22 0x8
0388 0x8800 0x0 0x0 0x4 &ipic 23 0x8
0389
0390 /* IDSEL 0x12 */
0391 0x9000 0x0 0x0 0x1 &ipic 22 0x8
0392 0x9000 0x0 0x0 0x2 &ipic 23 0x8
0393 0x9000 0x0 0x0 0x3 &ipic 20 0x8
0394 0x9000 0x0 0x0 0x4 &ipic 21 0x8
0395
0396 /* IDSEL 0x13 */
0397 0x9800 0x0 0x0 0x1 &ipic 23 0x8
0398 0x9800 0x0 0x0 0x2 &ipic 20 0x8
0399 0x9800 0x0 0x0 0x3 &ipic 21 0x8
0400 0x9800 0x0 0x0 0x4 &ipic 22 0x8
0401
0402 /* IDSEL 0x15 */
0403 0xa800 0x0 0x0 0x1 &ipic 20 0x8
0404 0xa800 0x0 0x0 0x2 &ipic 21 0x8
0405 0xa800 0x0 0x0 0x3 &ipic 22 0x8
0406 0xa800 0x0 0x0 0x4 &ipic 23 0x8
0407
0408 /* IDSEL 0x16 */
0409 0xb000 0x0 0x0 0x1 &ipic 23 0x8
0410 0xb000 0x0 0x0 0x2 &ipic 20 0x8
0411 0xb000 0x0 0x0 0x3 &ipic 21 0x8
0412 0xb000 0x0 0x0 0x4 &ipic 22 0x8
0413
0414 /* IDSEL 0x17 */
0415 0xb800 0x0 0x0 0x1 &ipic 22 0x8
0416 0xb800 0x0 0x0 0x2 &ipic 23 0x8
0417 0xb800 0x0 0x0 0x3 &ipic 20 0x8
0418 0xb800 0x0 0x0 0x4 &ipic 21 0x8
0419
0420 /* IDSEL 0x18 */
0421 0xc000 0x0 0x0 0x1 &ipic 21 0x8
0422 0xc000 0x0 0x0 0x2 &ipic 22 0x8
0423 0xc000 0x0 0x0 0x3 &ipic 23 0x8
0424 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
0425 interrupt-parent = <&ipic>;
0426 interrupts = <66 0x8>;
0427 bus-range = <0x0 0x0>;
0428 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0429 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0430 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
0431 sleep = <&pmc 0x00010000>;
0432 clock-frequency = <0>;
0433 #interrupt-cells = <1>;
0434 #size-cells = <2>;
0435 #address-cells = <3>;
0436 reg = <0xe0008500 0x100 /* internal registers */
0437 0xe0008300 0x8>; /* config space access registers */
0438 compatible = "fsl,mpc8349-pci";
0439 device_type = "pci";
0440 };
0441
0442 pci1: pcie@e0009000 {
0443 #address-cells = <3>;
0444 #size-cells = <2>;
0445 #interrupt-cells = <1>;
0446 device_type = "pci";
0447 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
0448 reg = <0xe0009000 0x00001000>;
0449 ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000
0450 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>;
0451 bus-range = <0 255>;
0452 interrupt-map-mask = <0xf800 0 0 7>;
0453 interrupt-map = <0 0 0 1 &ipic 1 8
0454 0 0 0 2 &ipic 1 8
0455 0 0 0 3 &ipic 1 8
0456 0 0 0 4 &ipic 1 8>;
0457 sleep = <&pmc 0x00300000>;
0458 clock-frequency = <0>;
0459
0460 pcie@0 {
0461 #address-cells = <3>;
0462 #size-cells = <2>;
0463 device_type = "pci";
0464 reg = <0 0 0 0 0>;
0465 ranges = <0x02000000 0 0xa8000000
0466 0x02000000 0 0xa8000000
0467 0 0x10000000
0468 0x01000000 0 0x00000000
0469 0x01000000 0 0x00000000
0470 0 0x00800000>;
0471 };
0472 };
0473
0474 pci2: pcie@e000a000 {
0475 #address-cells = <3>;
0476 #size-cells = <2>;
0477 #interrupt-cells = <1>;
0478 device_type = "pci";
0479 compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie";
0480 reg = <0xe000a000 0x00001000>;
0481 ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000
0482 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>;
0483 bus-range = <0 255>;
0484 interrupt-map-mask = <0xf800 0 0 7>;
0485 interrupt-map = <0 0 0 1 &ipic 2 8
0486 0 0 0 2 &ipic 2 8
0487 0 0 0 3 &ipic 2 8
0488 0 0 0 4 &ipic 2 8>;
0489 sleep = <&pmc 0x000c0000>;
0490 clock-frequency = <0>;
0491
0492 pcie@0 {
0493 #address-cells = <3>;
0494 #size-cells = <2>;
0495 device_type = "pci";
0496 reg = <0 0 0 0 0>;
0497 ranges = <0x02000000 0 0xc8000000
0498 0x02000000 0 0xc8000000
0499 0 0x10000000
0500 0x01000000 0 0x00000000
0501 0x01000000 0 0x00000000
0502 0 0x00800000>;
0503 };
0504 };
0505 };
