0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * MPC8349E MDS Device Tree Source
0004 *
0005 * Copyright 2005, 2006 Freescale Semiconductor Inc.
0006 */
0007
0008 /dts-v1/;
0009
0010 / {
0011 model = "MPC8349EMDS";
0012 compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
0013 #address-cells = <1>;
0014 #size-cells = <1>;
0015
0016 aliases {
0017 ethernet0 = &enet0;
0018 ethernet1 = &enet1;
0019 serial0 = &serial0;
0020 serial1 = &serial1;
0021 pci0 = &pci0;
0022 pci1 = &pci1;
0023 };
0024
0025 cpus {
0026 #address-cells = <1>;
0027 #size-cells = <0>;
0028
0029 PowerPC,8349@0 {
0030 device_type = "cpu";
0031 reg = <0x0>;
0032 d-cache-line-size = <32>;
0033 i-cache-line-size = <32>;
0034 d-cache-size = <32768>;
0035 i-cache-size = <32768>;
0036 timebase-frequency = <0>; // from bootloader
0037 bus-frequency = <0>; // from bootloader
0038 clock-frequency = <0>; // from bootloader
0039 };
0040 };
0041
0042 memory {
0043 device_type = "memory";
0044 reg = <0x00000000 0x10000000>; // 256MB at 0
0045 };
0046
0047 bcsr@e2400000 {
0048 compatible = "fsl,mpc8349mds-bcsr";
0049 reg = <0xe2400000 0x8000>;
0050 };
0051
0052 soc8349@e0000000 {
0053 #address-cells = <1>;
0054 #size-cells = <1>;
0055 device_type = "soc";
0056 compatible = "simple-bus";
0057 ranges = <0x0 0xe0000000 0x00100000>;
0058 reg = <0xe0000000 0x00000200>;
0059 bus-frequency = <0>;
0060
0061 wdt@200 {
0062 device_type = "watchdog";
0063 compatible = "mpc83xx_wdt";
0064 reg = <0x200 0x100>;
0065 };
0066
0067 i2c@3000 {
0068 #address-cells = <1>;
0069 #size-cells = <0>;
0070 cell-index = <0>;
0071 compatible = "fsl-i2c";
0072 reg = <0x3000 0x100>;
0073 interrupts = <14 0x8>;
0074 interrupt-parent = <&ipic>;
0075 dfsrr;
0076
0077 rtc@68 {
0078 compatible = "dallas,ds1374";
0079 reg = <0x68>;
0080 };
0081 };
0082
0083 i2c@3100 {
0084 #address-cells = <1>;
0085 #size-cells = <0>;
0086 cell-index = <1>;
0087 compatible = "fsl-i2c";
0088 reg = <0x3100 0x100>;
0089 interrupts = <15 0x8>;
0090 interrupt-parent = <&ipic>;
0091 dfsrr;
0092 };
0093
0094 spi@7000 {
0095 cell-index = <0>;
0096 compatible = "fsl,spi";
0097 reg = <0x7000 0x1000>;
0098 interrupts = <16 0x8>;
0099 interrupt-parent = <&ipic>;
0100 mode = "cpu";
0101 };
0102
0103 dma@82a8 {
0104 #address-cells = <1>;
0105 #size-cells = <1>;
0106 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
0107 reg = <0x82a8 4>;
0108 ranges = <0 0x8100 0x1a8>;
0109 interrupt-parent = <&ipic>;
0110 interrupts = <71 8>;
0111 cell-index = <0>;
0112 dma-channel@0 {
0113 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
0114 reg = <0 0x80>;
0115 cell-index = <0>;
0116 interrupt-parent = <&ipic>;
0117 interrupts = <71 8>;
0118 };
0119 dma-channel@80 {
0120 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
0121 reg = <0x80 0x80>;
0122 cell-index = <1>;
0123 interrupt-parent = <&ipic>;
0124 interrupts = <71 8>;
0125 };
0126 dma-channel@100 {
0127 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
0128 reg = <0x100 0x80>;
0129 cell-index = <2>;
0130 interrupt-parent = <&ipic>;
0131 interrupts = <71 8>;
0132 };
0133 dma-channel@180 {
0134 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
0135 reg = <0x180 0x28>;
0136 cell-index = <3>;
0137 interrupt-parent = <&ipic>;
0138 interrupts = <71 8>;
0139 };
0140 };
0141
0142 /* phy type (ULPI or SERIAL) are only types supported for MPH */
0143 /* port = 0 or 1 */
0144 usb@22000 {
0145 compatible = "fsl-usb2-mph";
0146 reg = <0x22000 0x1000>;
0147 #address-cells = <1>;
0148 #size-cells = <0>;
0149 interrupt-parent = <&ipic>;
0150 interrupts = <39 0x8>;
0151 phy_type = "ulpi";
0152 port0;
0153 };
0154 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
0155 usb@23000 {
0156 compatible = "fsl-usb2-dr";
0157 reg = <0x23000 0x1000>;
0158 #address-cells = <1>;
0159 #size-cells = <0>;
0160 interrupt-parent = <&ipic>;
0161 interrupts = <38 0x8>;
0162 dr_mode = "otg";
0163 phy_type = "ulpi";
0164 };
0165
0166 enet0: ethernet@24000 {
0167 #address-cells = <1>;
0168 #size-cells = <1>;
0169 cell-index = <0>;
0170 device_type = "network";
0171 model = "TSEC";
0172 compatible = "gianfar";
0173 reg = <0x24000 0x1000>;
0174 ranges = <0x0 0x24000 0x1000>;
0175 local-mac-address = [ 00 00 00 00 00 00 ];
0176 interrupts = <32 0x8 33 0x8 34 0x8>;
0177 interrupt-parent = <&ipic>;
0178 tbi-handle = <&tbi0>;
0179 phy-handle = <&phy0>;
0180 linux,network-index = <0>;
0181
0182 mdio@520 {
0183 #address-cells = <1>;
0184 #size-cells = <0>;
0185 compatible = "fsl,gianfar-mdio";
0186 reg = <0x520 0x20>;
0187
0188 phy0: ethernet-phy@0 {
0189 interrupt-parent = <&ipic>;
0190 interrupts = <17 0x8>;
0191 reg = <0x0>;
0192 };
0193
0194 phy1: ethernet-phy@1 {
0195 interrupt-parent = <&ipic>;
0196 interrupts = <18 0x8>;
0197 reg = <0x1>;
0198 };
0199
0200 tbi0: tbi-phy@11 {
0201 reg = <0x11>;
0202 device_type = "tbi-phy";
0203 };
0204 };
0205 };
0206
0207 enet1: ethernet@25000 {
0208 #address-cells = <1>;
0209 #size-cells = <1>;
0210 cell-index = <1>;
0211 device_type = "network";
0212 model = "TSEC";
0213 compatible = "gianfar";
0214 reg = <0x25000 0x1000>;
0215 ranges = <0x0 0x25000 0x1000>;
0216 local-mac-address = [ 00 00 00 00 00 00 ];
0217 interrupts = <35 0x8 36 0x8 37 0x8>;
0218 interrupt-parent = <&ipic>;
0219 tbi-handle = <&tbi1>;
0220 phy-handle = <&phy1>;
0221 linux,network-index = <1>;
0222
0223 mdio@520 {
0224 #address-cells = <1>;
0225 #size-cells = <0>;
0226 compatible = "fsl,gianfar-tbi";
0227 reg = <0x520 0x20>;
0228
0229 tbi1: tbi-phy@11 {
0230 reg = <0x11>;
0231 device_type = "tbi-phy";
0232 };
0233 };
0234 };
0235
0236 serial0: serial@4500 {
0237 cell-index = <0>;
0238 device_type = "serial";
0239 compatible = "fsl,ns16550", "ns16550";
0240 reg = <0x4500 0x100>;
0241 clock-frequency = <0>;
0242 interrupts = <9 0x8>;
0243 interrupt-parent = <&ipic>;
0244 };
0245
0246 serial1: serial@4600 {
0247 cell-index = <1>;
0248 device_type = "serial";
0249 compatible = "fsl,ns16550", "ns16550";
0250 reg = <0x4600 0x100>;
0251 clock-frequency = <0>;
0252 interrupts = <10 0x8>;
0253 interrupt-parent = <&ipic>;
0254 };
0255
0256 crypto@30000 {
0257 compatible = "fsl,sec2.0";
0258 reg = <0x30000 0x10000>;
0259 interrupts = <11 0x8>;
0260 interrupt-parent = <&ipic>;
0261 fsl,num-channels = <4>;
0262 fsl,channel-fifo-len = <24>;
0263 fsl,exec-units-mask = <0x7e>;
0264 fsl,descriptor-types-mask = <0x01010ebf>;
0265 };
0266
0267 /* IPIC
0268 * interrupts cell = <intr #, sense>
0269 * sense values match linux IORESOURCE_IRQ_* defines:
0270 * sense == 8: Level, low assertion
0271 * sense == 2: Edge, high-to-low change
0272 */
0273 ipic: pic@700 {
0274 interrupt-controller;
0275 #address-cells = <0>;
0276 #interrupt-cells = <2>;
0277 reg = <0x700 0x100>;
0278 device_type = "ipic";
0279 };
0280 };
0281
0282 pci0: pci@e0008500 {
0283 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0284 interrupt-map = <
0285
0286 /* IDSEL 0x11 */
0287 0x8800 0x0 0x0 0x1 &ipic 20 0x8
0288 0x8800 0x0 0x0 0x2 &ipic 21 0x8
0289 0x8800 0x0 0x0 0x3 &ipic 22 0x8
0290 0x8800 0x0 0x0 0x4 &ipic 23 0x8
0291
0292 /* IDSEL 0x12 */
0293 0x9000 0x0 0x0 0x1 &ipic 22 0x8
0294 0x9000 0x0 0x0 0x2 &ipic 23 0x8
0295 0x9000 0x0 0x0 0x3 &ipic 20 0x8
0296 0x9000 0x0 0x0 0x4 &ipic 21 0x8
0297
0298 /* IDSEL 0x13 */
0299 0x9800 0x0 0x0 0x1 &ipic 23 0x8
0300 0x9800 0x0 0x0 0x2 &ipic 20 0x8
0301 0x9800 0x0 0x0 0x3 &ipic 21 0x8
0302 0x9800 0x0 0x0 0x4 &ipic 22 0x8
0303
0304 /* IDSEL 0x15 */
0305 0xa800 0x0 0x0 0x1 &ipic 20 0x8
0306 0xa800 0x0 0x0 0x2 &ipic 21 0x8
0307 0xa800 0x0 0x0 0x3 &ipic 22 0x8
0308 0xa800 0x0 0x0 0x4 &ipic 23 0x8
0309
0310 /* IDSEL 0x16 */
0311 0xb000 0x0 0x0 0x1 &ipic 23 0x8
0312 0xb000 0x0 0x0 0x2 &ipic 20 0x8
0313 0xb000 0x0 0x0 0x3 &ipic 21 0x8
0314 0xb000 0x0 0x0 0x4 &ipic 22 0x8
0315
0316 /* IDSEL 0x17 */
0317 0xb800 0x0 0x0 0x1 &ipic 22 0x8
0318 0xb800 0x0 0x0 0x2 &ipic 23 0x8
0319 0xb800 0x0 0x0 0x3 &ipic 20 0x8
0320 0xb800 0x0 0x0 0x4 &ipic 21 0x8
0321
0322 /* IDSEL 0x18 */
0323 0xc000 0x0 0x0 0x1 &ipic 21 0x8
0324 0xc000 0x0 0x0 0x2 &ipic 22 0x8
0325 0xc000 0x0 0x0 0x3 &ipic 23 0x8
0326 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
0327 interrupt-parent = <&ipic>;
0328 interrupts = <66 0x8>;
0329 bus-range = <0 0>;
0330 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0331 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0332 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
0333 clock-frequency = <66666666>;
0334 #interrupt-cells = <1>;
0335 #size-cells = <2>;
0336 #address-cells = <3>;
0337 reg = <0xe0008500 0x100 /* internal registers */
0338 0xe0008300 0x8>; /* config space access registers */
0339 compatible = "fsl,mpc8349-pci";
0340 device_type = "pci";
0341 };
0342
0343 pci1: pci@e0008600 {
0344 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0345 interrupt-map = <
0346
0347 /* IDSEL 0x11 */
0348 0x8800 0x0 0x0 0x1 &ipic 20 0x8
0349 0x8800 0x0 0x0 0x2 &ipic 21 0x8
0350 0x8800 0x0 0x0 0x3 &ipic 22 0x8
0351 0x8800 0x0 0x0 0x4 &ipic 23 0x8
0352
0353 /* IDSEL 0x12 */
0354 0x9000 0x0 0x0 0x1 &ipic 22 0x8
0355 0x9000 0x0 0x0 0x2 &ipic 23 0x8
0356 0x9000 0x0 0x0 0x3 &ipic 20 0x8
0357 0x9000 0x0 0x0 0x4 &ipic 21 0x8
0358
0359 /* IDSEL 0x13 */
0360 0x9800 0x0 0x0 0x1 &ipic 23 0x8
0361 0x9800 0x0 0x0 0x2 &ipic 20 0x8
0362 0x9800 0x0 0x0 0x3 &ipic 21 0x8
0363 0x9800 0x0 0x0 0x4 &ipic 22 0x8
0364
0365 /* IDSEL 0x15 */
0366 0xa800 0x0 0x0 0x1 &ipic 20 0x8
0367 0xa800 0x0 0x0 0x2 &ipic 21 0x8
0368 0xa800 0x0 0x0 0x3 &ipic 22 0x8
0369 0xa800 0x0 0x0 0x4 &ipic 23 0x8
0370
0371 /* IDSEL 0x16 */
0372 0xb000 0x0 0x0 0x1 &ipic 23 0x8
0373 0xb000 0x0 0x0 0x2 &ipic 20 0x8
0374 0xb000 0x0 0x0 0x3 &ipic 21 0x8
0375 0xb000 0x0 0x0 0x4 &ipic 22 0x8
0376
0377 /* IDSEL 0x17 */
0378 0xb800 0x0 0x0 0x1 &ipic 22 0x8
0379 0xb800 0x0 0x0 0x2 &ipic 23 0x8
0380 0xb800 0x0 0x0 0x3 &ipic 20 0x8
0381 0xb800 0x0 0x0 0x4 &ipic 21 0x8
0382
0383 /* IDSEL 0x18 */
0384 0xc000 0x0 0x0 0x1 &ipic 21 0x8
0385 0xc000 0x0 0x0 0x2 &ipic 22 0x8
0386 0xc000 0x0 0x0 0x3 &ipic 23 0x8
0387 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
0388 interrupt-parent = <&ipic>;
0389 interrupts = <67 0x8>;
0390 bus-range = <0 0>;
0391 ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
0392 0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
0393 0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>;
0394 clock-frequency = <66666666>;
0395 #interrupt-cells = <1>;
0396 #size-cells = <2>;
0397 #address-cells = <3>;
0398 reg = <0xe0008600 0x100 /* internal registers */
0399 0xe0008380 0x8>; /* config space access registers */
0400 compatible = "fsl,mpc8349-pci";
0401 device_type = "pci";
0402 };
0403 };
