Back to home page

OSCL-LXR

 
 

    


0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * MPC8349E-mITX-GP Device Tree Source
0004  *
0005  * Copyright 2007 Freescale Semiconductor Inc.
0006  */
0007 
0008 /dts-v1/;
0009 
0010 / {
0011         model = "MPC8349EMITXGP";
0012         compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
0013         #address-cells = <1>;
0014         #size-cells = <1>;
0015 
0016         aliases {
0017                 ethernet0 = &enet0;
0018                 serial0 = &serial0;
0019                 serial1 = &serial1;
0020                 pci0 = &pci0;
0021         };
0022 
0023         cpus {
0024                 #address-cells = <1>;
0025                 #size-cells = <0>;
0026 
0027                 PowerPC,8349@0 {
0028                         device_type = "cpu";
0029                         reg = <0x0>;
0030                         d-cache-line-size = <32>;
0031                         i-cache-line-size = <32>;
0032                         d-cache-size = <32768>;
0033                         i-cache-size = <32768>;
0034                         timebase-frequency = <0>;       // from bootloader
0035                         bus-frequency = <0>;            // from bootloader
0036                         clock-frequency = <0>;          // from bootloader
0037                 };
0038         };
0039 
0040         memory {
0041                 device_type = "memory";
0042                 reg = <0x00000000 0x10000000>;
0043         };
0044 
0045         soc8349@e0000000 {
0046                 #address-cells = <1>;
0047                 #size-cells = <1>;
0048                 device_type = "soc";
0049                 compatible = "simple-bus";
0050                 ranges = <0x0 0xe0000000 0x00100000>;
0051                 reg = <0xe0000000 0x00000200>;
0052                 bus-frequency = <0>;                    // from bootloader
0053 
0054                 wdt@200 {
0055                         device_type = "watchdog";
0056                         compatible = "mpc83xx_wdt";
0057                         reg = <0x200 0x100>;
0058                 };
0059 
0060                 i2c@3000 {
0061                         #address-cells = <1>;
0062                         #size-cells = <0>;
0063                         cell-index = <0>;
0064                         compatible = "fsl-i2c";
0065                         reg = <0x3000 0x100>;
0066                         interrupts = <14 0x8>;
0067                         interrupt-parent = <&ipic>;
0068                         dfsrr;
0069                 };
0070 
0071                 i2c@3100 {
0072                         #address-cells = <1>;
0073                         #size-cells = <0>;
0074                         cell-index = <1>;
0075                         compatible = "fsl-i2c";
0076                         reg = <0x3100 0x100>;
0077                         interrupts = <15 0x8>;
0078                         interrupt-parent = <&ipic>;
0079                         dfsrr;
0080 
0081                         rtc@68 {
0082                                 compatible = "dallas,ds1339";
0083                                 reg = <0x68>;
0084                                 interrupts = <18 0x8>;
0085                                 interrupt-parent = <&ipic>;
0086                         };
0087                 };
0088 
0089                 spi@7000 {
0090                         cell-index = <0>;
0091                         compatible = "fsl,spi";
0092                         reg = <0x7000 0x1000>;
0093                         interrupts = <16 0x8>;
0094                         interrupt-parent = <&ipic>;
0095                         mode = "cpu";
0096                 };
0097 
0098                 dma@82a8 {
0099                         #address-cells = <1>;
0100                         #size-cells = <1>;
0101                         compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
0102                         reg = <0x82a8 4>;
0103                         ranges = <0 0x8100 0x1a8>;
0104                         interrupt-parent = <&ipic>;
0105                         interrupts = <71 8>;
0106                         cell-index = <0>;
0107                         dma-channel@0 {
0108                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
0109                                 reg = <0 0x80>;
0110                                 cell-index = <0>;
0111                                 interrupt-parent = <&ipic>;
0112                                 interrupts = <71 8>;
0113                         };
0114                         dma-channel@80 {
0115                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
0116                                 reg = <0x80 0x80>;
0117                                 cell-index = <1>;
0118                                 interrupt-parent = <&ipic>;
0119                                 interrupts = <71 8>;
0120                         };
0121                         dma-channel@100 {
0122                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
0123                                 reg = <0x100 0x80>;
0124                                 cell-index = <2>;
0125                                 interrupt-parent = <&ipic>;
0126                                 interrupts = <71 8>;
0127                         };
0128                         dma-channel@180 {
0129                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
0130                                 reg = <0x180 0x28>;
0131                                 cell-index = <3>;
0132                                 interrupt-parent = <&ipic>;
0133                                 interrupts = <71 8>;
0134                         };
0135                 };
0136 
0137                 usb@23000 {
0138                         compatible = "fsl-usb2-dr";
0139                         reg = <0x23000 0x1000>;
0140                         #address-cells = <1>;
0141                         #size-cells = <0>;
0142                         interrupt-parent = <&ipic>;
0143                         interrupts = <38 0x8>;
0144                         dr_mode = "otg";
0145                         phy_type = "ulpi";
0146                 };
0147 
0148                 enet0: ethernet@24000 {
0149                         #address-cells = <1>;
0150                         #size-cells = <1>;
0151                         cell-index = <0>;
0152                         device_type = "network";
0153                         model = "TSEC";
0154                         compatible = "gianfar";
0155                         reg = <0x24000 0x1000>;
0156                         ranges = <0x0 0x24000 0x1000>;
0157                         local-mac-address = [ 00 00 00 00 00 00 ];
0158                         interrupts = <32 0x8 33 0x8 34 0x8>;
0159                         interrupt-parent = <&ipic>;
0160                         tbi-handle = <&tbi0>;
0161                         phy-handle = <&phy1c>;
0162                         linux,network-index = <0>;
0163 
0164                         mdio@520 {
0165                                 #address-cells = <1>;
0166                                 #size-cells = <0>;
0167                                 compatible = "fsl,gianfar-mdio";
0168                                 reg = <0x520 0x20>;
0169 
0170                                 /* Vitesse 8201 */
0171                                 phy1c: ethernet-phy@1c {
0172                                         interrupt-parent = <&ipic>;
0173                                         interrupts = <18 0x8>;
0174                                         reg = <0x1c>;
0175                                 };
0176 
0177                                 tbi0: tbi-phy@11 {
0178                                         reg = <0x11>;
0179                                         device_type = "tbi-phy";
0180                                 };
0181                         };
0182                 };
0183 
0184                 serial0: serial@4500 {
0185                         cell-index = <0>;
0186                         device_type = "serial";
0187                         compatible = "fsl,ns16550", "ns16550";
0188                         reg = <0x4500 0x100>;
0189                         clock-frequency = <0>;          // from bootloader
0190                         interrupts = <9 0x8>;
0191                         interrupt-parent = <&ipic>;
0192                 };
0193 
0194                 serial1: serial@4600 {
0195                         cell-index = <1>;
0196                         device_type = "serial";
0197                         compatible = "fsl,ns16550", "ns16550";
0198                         reg = <0x4600 0x100>;
0199                         clock-frequency = <0>;          // from bootloader
0200                         interrupts = <10 0x8>;
0201                         interrupt-parent = <&ipic>;
0202                 };
0203 
0204                 crypto@30000 {
0205                         compatible = "fsl,sec2.0";
0206                         reg = <0x30000 0x10000>;
0207                         interrupts = <11 0x8>;
0208                         interrupt-parent = <&ipic>;
0209                         fsl,num-channels = <4>;
0210                         fsl,channel-fifo-len = <24>;
0211                         fsl,exec-units-mask = <0x7e>;
0212                         fsl,descriptor-types-mask = <0x01010ebf>;
0213                 };
0214 
0215                 ipic: pic@700 {
0216                         interrupt-controller;
0217                         #address-cells = <0>;
0218                         #interrupt-cells = <2>;
0219                         reg = <0x700 0x100>;
0220                         device_type = "ipic";
0221                 };
0222         };
0223 
0224         pci0: pci@e0008600 {
0225                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0226                 interrupt-map = <
0227                                 /* IDSEL 0x0F - PCI Slot */
0228                                 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
0229                                 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
0230                                  >;
0231                 interrupt-parent = <&ipic>;
0232                 interrupts = <67 0x8>;
0233                 bus-range = <0x1 0x1>;
0234                 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
0235                           0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
0236                           0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
0237                 clock-frequency = <66666666>;
0238                 #interrupt-cells = <1>;
0239                 #size-cells = <2>;
0240                 #address-cells = <3>;
0241                 reg = <0xe0008600 0x100         /* internal registers */
0242                        0xe0008380 0x8>;         /* config space access registers */
0243                 compatible = "fsl,mpc8349-pci";
0244                 device_type = "pci";
0245         };
0246 };