0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * mpc8308_p1m Device Tree Source
0004 *
0005 * Copyright 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com
0006 */
0007
0008 /dts-v1/;
0009
0010 / {
0011 compatible = "denx,mpc8308_p1m";
0012 #address-cells = <1>;
0013 #size-cells = <1>;
0014
0015 aliases {
0016 ethernet0 = &enet0;
0017 ethernet1 = &enet1;
0018 serial0 = &serial0;
0019 serial1 = &serial1;
0020 pci0 = &pci0;
0021 };
0022
0023 cpus {
0024 #address-cells = <1>;
0025 #size-cells = <0>;
0026
0027 PowerPC,8308@0 {
0028 device_type = "cpu";
0029 reg = <0x0>;
0030 d-cache-line-size = <32>;
0031 i-cache-line-size = <32>;
0032 d-cache-size = <16384>;
0033 i-cache-size = <16384>;
0034 timebase-frequency = <0>; // from bootloader
0035 bus-frequency = <0>; // from bootloader
0036 clock-frequency = <0>; // from bootloader
0037 };
0038 };
0039
0040 memory {
0041 device_type = "memory";
0042 reg = <0x00000000 0x08000000>; // 128MB at 0
0043 };
0044
0045 localbus@e0005000 {
0046 #address-cells = <2>;
0047 #size-cells = <1>;
0048 compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
0049 reg = <0xe0005000 0x1000>;
0050 interrupts = <77 0x8>;
0051 interrupt-parent = <&ipic>;
0052
0053 ranges = <0x0 0x0 0xfc000000 0x04000000
0054 0x1 0x0 0xfbff0000 0x00008000
0055 0x2 0x0 0xfbff8000 0x00008000>;
0056
0057 flash@0,0 {
0058 #address-cells = <1>;
0059 #size-cells = <1>;
0060 compatible = "cfi-flash";
0061 reg = <0x0 0x0 0x4000000>;
0062 bank-width = <2>;
0063 device-width = <1>;
0064
0065 u-boot@0 {
0066 reg = <0x0 0x60000>;
0067 read-only;
0068 };
0069 env@60000 {
0070 reg = <0x60000 0x20000>;
0071 };
0072 env1@80000 {
0073 reg = <0x80000 0x20000>;
0074 };
0075 kernel@a0000 {
0076 reg = <0xa0000 0x200000>;
0077 };
0078 dtb@2a0000 {
0079 reg = <0x2a0000 0x20000>;
0080 };
0081 ramdisk@2c0000 {
0082 reg = <0x2c0000 0x640000>;
0083 };
0084 user@700000 {
0085 reg = <0x700000 0x3900000>;
0086 };
0087 };
0088
0089 can@1,0 {
0090 compatible = "nxp,sja1000";
0091 reg = <0x1 0x0 0x80>;
0092 interrupts = <18 0x8>;
0093 interrups-parent = <&ipic>;
0094 };
0095
0096 cpld@2,0 {
0097 compatible = "denx,mpc8308_p1m-cpld";
0098 reg = <0x2 0x0 0x8>;
0099 interrupts = <48 0x8>;
0100 interrups-parent = <&ipic>;
0101 };
0102 };
0103
0104 immr@e0000000 {
0105 #address-cells = <1>;
0106 #size-cells = <1>;
0107 device_type = "soc";
0108 compatible = "fsl,mpc8308-immr", "simple-bus";
0109 ranges = <0 0xe0000000 0x00100000>;
0110 reg = <0xe0000000 0x00000200>;
0111 bus-frequency = <0>;
0112
0113 i2c@3000 {
0114 #address-cells = <1>;
0115 #size-cells = <0>;
0116 compatible = "fsl-i2c";
0117 reg = <0x3000 0x100>;
0118 interrupts = <14 0x8>;
0119 interrupt-parent = <&ipic>;
0120 dfsrr;
0121 fram@50 {
0122 compatible = "ramtron,24c64", "atmel,24c64";
0123 reg = <0x50>;
0124 };
0125 };
0126
0127 i2c@3100 {
0128 #address-cells = <1>;
0129 #size-cells = <0>;
0130 compatible = "fsl-i2c";
0131 reg = <0x3100 0x100>;
0132 interrupts = <15 0x8>;
0133 interrupt-parent = <&ipic>;
0134 dfsrr;
0135 pwm@28 {
0136 compatible = "maxim,ds1050";
0137 reg = <0x28>;
0138 };
0139 sensor@48 {
0140 compatible = "maxim,max6625";
0141 reg = <0x48>;
0142 };
0143 sensor@49 {
0144 compatible = "maxim,max6625";
0145 reg = <0x49>;
0146 };
0147 sensor@4b {
0148 compatible = "maxim,max6625";
0149 reg = <0x4b>;
0150 };
0151 };
0152
0153 usb@23000 {
0154 compatible = "fsl-usb2-dr";
0155 reg = <0x23000 0x1000>;
0156 #address-cells = <1>;
0157 #size-cells = <0>;
0158 interrupt-parent = <&ipic>;
0159 interrupts = <38 0x8>;
0160 dr_mode = "peripheral";
0161 phy_type = "ulpi";
0162 };
0163
0164 enet0: ethernet@24000 {
0165 #address-cells = <1>;
0166 #size-cells = <1>;
0167 ranges = <0x0 0x24000 0x1000>;
0168
0169 cell-index = <0>;
0170 device_type = "network";
0171 model = "eTSEC";
0172 compatible = "gianfar";
0173 reg = <0x24000 0x1000>;
0174 local-mac-address = [ 00 00 00 00 00 00 ];
0175 interrupts = <32 0x8 33 0x8 34 0x8>;
0176 interrupt-parent = <&ipic>;
0177 phy-handle = < &phy1 >;
0178
0179 mdio@520 {
0180 #address-cells = <1>;
0181 #size-cells = <0>;
0182 compatible = "fsl,gianfar-mdio";
0183 reg = <0x520 0x20>;
0184 phy1: ethernet-phy@1 {
0185 interrupt-parent = <&ipic>;
0186 interrupts = <17 0x8>;
0187 reg = <0x1>;
0188 };
0189 phy2: ethernet-phy@2 {
0190 interrupt-parent = <&ipic>;
0191 interrupts = <19 0x8>;
0192 reg = <0x2>;
0193 };
0194 tbi0: tbi-phy@11 {
0195 reg = <0x11>;
0196 device_type = "tbi-phy";
0197 };
0198 };
0199 };
0200
0201 enet1: ethernet@25000 {
0202 #address-cells = <1>;
0203 #size-cells = <1>;
0204 cell-index = <1>;
0205 device_type = "network";
0206 model = "eTSEC";
0207 compatible = "gianfar";
0208 reg = <0x25000 0x1000>;
0209 ranges = <0x0 0x25000 0x1000>;
0210 local-mac-address = [ 00 00 00 00 00 00 ];
0211 interrupts = <35 0x8 36 0x8 37 0x8>;
0212 interrupt-parent = <&ipic>;
0213 phy-handle = < &phy2 >;
0214
0215 mdio@520 {
0216 #address-cells = <1>;
0217 #size-cells = <0>;
0218 compatible = "fsl,gianfar-tbi";
0219 reg = <0x520 0x20>;
0220 tbi1: tbi-phy@11 {
0221 reg = <0x11>;
0222 device_type = "tbi-phy";
0223 };
0224 };
0225 };
0226
0227 serial0: serial@4500 {
0228 cell-index = <0>;
0229 device_type = "serial";
0230 compatible = "fsl,ns16550", "ns16550";
0231 reg = <0x4500 0x100>;
0232 clock-frequency = <133333333>;
0233 interrupts = <9 0x8>;
0234 interrupt-parent = <&ipic>;
0235 };
0236
0237 serial1: serial@4600 {
0238 cell-index = <1>;
0239 device_type = "serial";
0240 compatible = "fsl,ns16550", "ns16550";
0241 reg = <0x4600 0x100>;
0242 clock-frequency = <133333333>;
0243 interrupts = <10 0x8>;
0244 interrupt-parent = <&ipic>;
0245 };
0246
0247 gpio@c00 {
0248 #gpio-cells = <2>;
0249 compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio";
0250 reg = <0xc00 0x18>;
0251 interrupts = <74 0x8>;
0252 interrupt-parent = <&ipic>;
0253 gpio-controller;
0254 };
0255
0256 timer@500 {
0257 compatible = "fsl,mpc8308-gtm", "fsl,gtm";
0258 reg = <0x500 0x100>;
0259 interrupts = <90 8 78 8 84 8 72 8>;
0260 interrupt-parent = <&ipic>;
0261 clock-frequency = <133333333>;
0262 };
0263
0264 /* IPIC
0265 * interrupts cell = <intr #, sense>
0266 * sense values match linux IORESOURCE_IRQ_* defines:
0267 * sense == 8: Level, low assertion
0268 * sense == 2: Edge, high-to-low change
0269 */
0270 ipic: interrupt-controller@700 {
0271 compatible = "fsl,ipic";
0272 interrupt-controller;
0273 #address-cells = <0>;
0274 #interrupt-cells = <2>;
0275 reg = <0x700 0x100>;
0276 device_type = "ipic";
0277 };
0278
0279 ipic-msi@7c0 {
0280 compatible = "fsl,ipic-msi";
0281 reg = <0x7c0 0x40>;
0282 msi-available-ranges = <0x0 0x100>;
0283 interrupts = < 0x43 0x8
0284 0x4 0x8
0285 0x51 0x8
0286 0x52 0x8
0287 0x56 0x8
0288 0x57 0x8
0289 0x58 0x8
0290 0x59 0x8 >;
0291 interrupt-parent = < &ipic >;
0292 };
0293
0294 dma@2c000 {
0295 compatible = "fsl,mpc8308-dma";
0296 reg = <0x2c000 0x1800>;
0297 interrupts = <3 0x8
0298 94 0x8>;
0299 interrupt-parent = < &ipic >;
0300 };
0301
0302 };
0303
0304 pci0: pcie@e0009000 {
0305 #address-cells = <3>;
0306 #size-cells = <2>;
0307 #interrupt-cells = <1>;
0308 device_type = "pci";
0309 compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie";
0310 reg = <0xe0009000 0x00001000
0311 0xb0000000 0x01000000>;
0312 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
0313 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
0314 bus-range = <0 0>;
0315 interrupt-map-mask = <0 0 0 0>;
0316 interrupt-map = <0 0 0 0 &ipic 1 8>;
0317 interrupts = <0x1 0x8>;
0318 interrupt-parent = <&ipic>;
0319 clock-frequency = <0>;
0320
0321 pcie@0 {
0322 #address-cells = <3>;
0323 #size-cells = <2>;
0324 device_type = "pci";
0325 reg = <0 0 0 0 0>;
0326 ranges = <0x02000000 0 0xa0000000
0327 0x02000000 0 0xa0000000
0328 0 0x10000000
0329 0x01000000 0 0x00000000
0330 0x01000000 0 0x00000000
0331 0 0x00800000>;
0332 };
0333 };
0334 };
