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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * MPC8272 ADS Device Tree Source
0004  *
0005  * Copyright 2005,2008 Freescale Semiconductor Inc.
0006  */
0007 
0008 /dts-v1/;
0009 
0010 / {
0011         model = "MPC8272ADS";
0012         compatible = "fsl,mpc8272ads";
0013         #address-cells = <1>;
0014         #size-cells = <1>;
0015 
0016         aliases {
0017                 ethernet0 = &eth0;
0018                 ethernet1 = &eth1;
0019                 serial0 = &scc1;
0020                 serial1 = &scc4;
0021         };
0022 
0023         cpus {
0024                 #address-cells = <1>;
0025                 #size-cells = <0>;
0026 
0027                 PowerPC,8272@0 {
0028                         device_type = "cpu";
0029                         reg = <0x0>;
0030                         d-cache-line-size = <32>;
0031                         i-cache-line-size = <32>;
0032                         d-cache-size = <16384>;
0033                         i-cache-size = <16384>;
0034                         timebase-frequency = <0>;
0035                         bus-frequency = <0>;
0036                         clock-frequency = <0>;
0037                 };
0038         };
0039 
0040         memory {
0041                 device_type = "memory";
0042                 reg = <0x0 0x0>;
0043         };
0044 
0045         localbus@f0010100 {
0046                 compatible = "fsl,mpc8272-localbus",
0047                              "fsl,pq2-localbus";
0048                 #address-cells = <2>;
0049                 #size-cells = <1>;
0050                 reg = <0xf0010100 0x40>;
0051 
0052                 ranges = <0x0 0x0 0xff800000 0x00800000
0053                           0x1 0x0 0xf4500000 0x8000
0054                           0x3 0x0 0xf8200000 0x8000>;
0055 
0056                 flash@0,0 {
0057                         compatible = "jedec-flash";
0058                         reg = <0x0 0x0 0x00800000>;
0059                         bank-width = <4>;
0060                         device-width = <1>;
0061                 };
0062 
0063                 board-control@1,0 {
0064                         reg = <0x1 0x0 0x20>;
0065                         compatible = "fsl,mpc8272ads-bcsr";
0066                 };
0067 
0068                 PCI_PIC: interrupt-controller@3,0 {
0069                         compatible = "fsl,mpc8272ads-pci-pic",
0070                                      "fsl,pq2ads-pci-pic";
0071                         #interrupt-cells = <1>;
0072                         interrupt-controller;
0073                         reg = <0x3 0x0 0x8>;
0074                         interrupt-parent = <&PIC>;
0075                         interrupts = <20 8>;
0076                 };
0077         };
0078 
0079 
0080         pci@f0010800 {
0081                 device_type = "pci";
0082                 reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
0083                 compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
0084                 #interrupt-cells = <1>;
0085                 #size-cells = <2>;
0086                 #address-cells = <3>;
0087                 clock-frequency = <66666666>;
0088                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0089                 interrupt-map = <
0090                                  /* IDSEL 0x16 */
0091                                  0xb000 0x0 0x0 0x1 &PCI_PIC 0
0092                                  0xb000 0x0 0x0 0x2 &PCI_PIC 1
0093                                  0xb000 0x0 0x0 0x3 &PCI_PIC 2
0094                                  0xb000 0x0 0x0 0x4 &PCI_PIC 3
0095 
0096                                  /* IDSEL 0x17 */
0097                                  0xb800 0x0 0x0 0x1 &PCI_PIC 4
0098                                  0xb800 0x0 0x0 0x2 &PCI_PIC 5
0099                                  0xb800 0x0 0x0 0x3 &PCI_PIC 6
0100                                  0xb800 0x0 0x0 0x4 &PCI_PIC 7
0101 
0102                                  /* IDSEL 0x18 */
0103                                  0xc000 0x0 0x0 0x1 &PCI_PIC 8
0104                                  0xc000 0x0 0x0 0x2 &PCI_PIC 9
0105                                  0xc000 0x0 0x0 0x3 &PCI_PIC 10
0106                                  0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
0107 
0108                 interrupt-parent = <&PIC>;
0109                 interrupts = <18 8>;
0110                 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
0111                           0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
0112                           0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
0113         };
0114 
0115         soc@f0000000 {
0116                 #address-cells = <1>;
0117                 #size-cells = <1>;
0118                 device_type = "soc";
0119                 compatible = "fsl,mpc8272", "fsl,pq2-soc";
0120                 ranges = <0x0 0xf0000000 0x53000>;
0121 
0122                 // Temporary -- will go away once kernel uses ranges for get_immrbase().
0123                 reg = <0xf0000000 0x53000>;
0124 
0125                 cpm@119c0 {
0126                         #address-cells = <1>;
0127                         #size-cells = <1>;
0128                         compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
0129                         reg = <0x119c0 0x30>;
0130                         ranges;
0131 
0132                         muram@0 {
0133                                 #address-cells = <1>;
0134                                 #size-cells = <1>;
0135                                 ranges = <0x0 0x0 0x10000>;
0136 
0137                                 data@0 {
0138                                         compatible = "fsl,cpm-muram-data";
0139                                         reg = <0x0 0x2000 0x9800 0x800>;
0140                                 };
0141                         };
0142 
0143                         brg@119f0 {
0144                                 compatible = "fsl,mpc8272-brg",
0145                                              "fsl,cpm2-brg",
0146                                              "fsl,cpm-brg";
0147                                 reg = <0x119f0 0x10 0x115f0 0x10>;
0148                         };
0149 
0150                         scc1: serial@11a00 {
0151                                 device_type = "serial";
0152                                 compatible = "fsl,mpc8272-scc-uart",
0153                                              "fsl,cpm2-scc-uart";
0154                                 reg = <0x11a00 0x20 0x8000 0x100>;
0155                                 interrupts = <40 8>;
0156                                 interrupt-parent = <&PIC>;
0157                                 fsl,cpm-brg = <1>;
0158                                 fsl,cpm-command = <0x800000>;
0159                         };
0160 
0161                         scc4: serial@11a60 {
0162                                 device_type = "serial";
0163                                 compatible = "fsl,mpc8272-scc-uart",
0164                                              "fsl,cpm2-scc-uart";
0165                                 reg = <0x11a60 0x20 0x8300 0x100>;
0166                                 interrupts = <43 8>;
0167                                 interrupt-parent = <&PIC>;
0168                                 fsl,cpm-brg = <4>;
0169                                 fsl,cpm-command = <0xce00000>;
0170                         };
0171 
0172                         usb@11b60 {
0173                                 compatible = "fsl,mpc8272-cpm-usb";
0174                                 reg = <0x11b60 0x40 0x8b00 0x100>;
0175                                 interrupts = <11 8>;
0176                                 interrupt-parent = <&PIC>;
0177                                 mode = "peripheral";
0178                         };
0179 
0180                         mdio@10d40 {
0181                                 compatible = "fsl,mpc8272ads-mdio-bitbang",
0182                                              "fsl,mpc8272-mdio-bitbang",
0183                                              "fsl,cpm2-mdio-bitbang";
0184                                 reg = <0x10d40 0x14>;
0185                                 #address-cells = <1>;
0186                                 #size-cells = <0>;
0187                                 fsl,mdio-pin = <18>;
0188                                 fsl,mdc-pin = <19>;
0189 
0190                                 PHY0: ethernet-phy@0 {
0191                                         interrupt-parent = <&PIC>;
0192                                         interrupts = <23 8>;
0193                                         reg = <0x0>;
0194                                 };
0195 
0196                                 PHY1: ethernet-phy@1 {
0197                                         interrupt-parent = <&PIC>;
0198                                         interrupts = <23 8>;
0199                                         reg = <0x3>;
0200                                 };
0201                         };
0202 
0203                         eth0: ethernet@11300 {
0204                                 device_type = "network";
0205                                 compatible = "fsl,mpc8272-fcc-enet",
0206                                              "fsl,cpm2-fcc-enet";
0207                                 reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
0208                                 local-mac-address = [ 00 00 00 00 00 00 ];
0209                                 interrupts = <32 8>;
0210                                 interrupt-parent = <&PIC>;
0211                                 phy-handle = <&PHY0>;
0212                                 linux,network-index = <0>;
0213                                 fsl,cpm-command = <0x12000300>;
0214                         };
0215 
0216                         eth1: ethernet@11320 {
0217                                 device_type = "network";
0218                                 compatible = "fsl,mpc8272-fcc-enet",
0219                                              "fsl,cpm2-fcc-enet";
0220                                 reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
0221                                 local-mac-address = [ 00 00 00 00 00 00 ];
0222                                 interrupts = <33 8>;
0223                                 interrupt-parent = <&PIC>;
0224                                 phy-handle = <&PHY1>;
0225                                 linux,network-index = <1>;
0226                                 fsl,cpm-command = <0x16200300>;
0227                         };
0228 
0229                         i2c@11860 {
0230                                 compatible = "fsl,mpc8272-i2c",
0231                                              "fsl,cpm2-i2c";
0232                                 reg = <0x11860 0x20 0x8afc 0x2>;
0233                                 interrupts = <1 8>;
0234                                 interrupt-parent = <&PIC>;
0235                                 fsl,cpm-command = <0x29600000>;
0236                                 #address-cells = <1>;
0237                                 #size-cells = <0>;
0238                         };
0239                 };
0240 
0241                 PIC: interrupt-controller@10c00 {
0242                         #interrupt-cells = <2>;
0243                         interrupt-controller;
0244                         reg = <0x10c00 0x80>;
0245                         compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
0246                 };
0247 
0248                 crypto@30000 {
0249                         compatible = "fsl,sec1.0";
0250                         reg = <0x40000 0x13000>;
0251                         interrupts = <47 0x8>;
0252                         interrupt-parent = <&PIC>;
0253                         fsl,num-channels = <4>;
0254                         fsl,channel-fifo-len = <24>;
0255                         fsl,exec-units-mask = <0x7e>;
0256                         fsl,descriptor-types-mask = <0x1010415>;
0257                 };
0258         };
0259 
0260         chosen {
0261                 stdout-path = "/soc/cpm/serial@11a00";
0262         };
0263 };