0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * base MPC5200b Device Tree Source
0004 *
0005 * Copyright (C) 2010 SecretLab
0006 * Grant Likely <grant@secretlab.ca>
0007 * John Bonesio <bones@secretlab.ca>
0008 */
0009
0010 /dts-v1/;
0011
0012 / {
0013 model = "fsl,mpc5200b";
0014 compatible = "fsl,mpc5200b";
0015 #address-cells = <1>;
0016 #size-cells = <1>;
0017 interrupt-parent = <&mpc5200_pic>;
0018
0019 cpus {
0020 #address-cells = <1>;
0021 #size-cells = <0>;
0022
0023 powerpc: PowerPC,5200@0 {
0024 device_type = "cpu";
0025 reg = <0>;
0026 d-cache-line-size = <32>;
0027 i-cache-line-size = <32>;
0028 d-cache-size = <0x4000>; // L1, 16K
0029 i-cache-size = <0x4000>; // L1, 16K
0030 timebase-frequency = <0>; // from bootloader
0031 bus-frequency = <0>; // from bootloader
0032 clock-frequency = <0>; // from bootloader
0033 };
0034 };
0035
0036 memory: memory@0 {
0037 device_type = "memory";
0038 reg = <0x00000000 0x04000000>; // 64MB
0039 };
0040
0041 soc: soc5200@f0000000 {
0042 #address-cells = <1>;
0043 #size-cells = <1>;
0044 compatible = "fsl,mpc5200b-immr";
0045 ranges = <0 0xf0000000 0x0000c000>;
0046 reg = <0xf0000000 0x00000100>;
0047 bus-frequency = <0>; // from bootloader
0048 system-frequency = <0>; // from bootloader
0049
0050 cdm@200 {
0051 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
0052 reg = <0x200 0x38>;
0053 };
0054
0055 mpc5200_pic: interrupt-controller@500 {
0056 // 5200 interrupts are encoded into two levels;
0057 interrupt-controller;
0058 #interrupt-cells = <3>;
0059 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
0060 reg = <0x500 0x80>;
0061 };
0062
0063 gpt0: timer@600 { // General Purpose Timer
0064 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
0065 #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode
0066 reg = <0x600 0x10>;
0067 interrupts = <1 9 0>;
0068 // add 'fsl,has-wdt' to enable watchdog
0069 };
0070
0071 gpt1: timer@610 { // General Purpose Timer
0072 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
0073 #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode
0074 reg = <0x610 0x10>;
0075 interrupts = <1 10 0>;
0076 };
0077
0078 gpt2: timer@620 { // General Purpose Timer
0079 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
0080 #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode
0081 reg = <0x620 0x10>;
0082 interrupts = <1 11 0>;
0083 };
0084
0085 gpt3: timer@630 { // General Purpose Timer
0086 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
0087 #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode
0088 reg = <0x630 0x10>;
0089 interrupts = <1 12 0>;
0090 };
0091
0092 gpt4: timer@640 { // General Purpose Timer
0093 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
0094 #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode
0095 reg = <0x640 0x10>;
0096 interrupts = <1 13 0>;
0097 };
0098
0099 gpt5: timer@650 { // General Purpose Timer
0100 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
0101 #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode
0102 reg = <0x650 0x10>;
0103 interrupts = <1 14 0>;
0104 };
0105
0106 gpt6: timer@660 { // General Purpose Timer
0107 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
0108 #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode
0109 reg = <0x660 0x10>;
0110 interrupts = <1 15 0>;
0111 };
0112
0113 gpt7: timer@670 { // General Purpose Timer
0114 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
0115 #gpio-cells = <2>; // Add 'gpio-controller;' to enable gpio mode
0116 reg = <0x670 0x10>;
0117 interrupts = <1 16 0>;
0118 };
0119
0120 rtc@800 { // Real time clock
0121 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
0122 reg = <0x800 0x100>;
0123 interrupts = <1 5 0 1 6 0>;
0124 };
0125
0126 can@900 {
0127 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
0128 interrupts = <2 17 0>;
0129 reg = <0x900 0x80>;
0130 };
0131
0132 can@980 {
0133 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
0134 interrupts = <2 18 0>;
0135 reg = <0x980 0x80>;
0136 };
0137
0138 gpio_simple: gpio@b00 {
0139 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
0140 reg = <0xb00 0x40>;
0141 interrupts = <1 7 0>;
0142 gpio-controller;
0143 #gpio-cells = <2>;
0144 };
0145
0146 gpio_wkup: gpio@c00 {
0147 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
0148 reg = <0xc00 0x40>;
0149 interrupts = <1 8 0 0 3 0>;
0150 gpio-controller;
0151 #gpio-cells = <2>;
0152 };
0153
0154 spi@f00 {
0155 #address-cells = <1>;
0156 #size-cells = <0>;
0157 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
0158 reg = <0xf00 0x20>;
0159 interrupts = <2 13 0 2 14 0>;
0160 };
0161
0162 usb: usb@1000 {
0163 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
0164 reg = <0x1000 0xff>;
0165 interrupts = <2 6 0>;
0166 };
0167
0168 dma-controller@1200 {
0169 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
0170 reg = <0x1200 0x80>;
0171 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
0172 3 4 0 3 5 0 3 6 0 3 7 0
0173 3 8 0 3 9 0 3 10 0 3 11 0
0174 3 12 0 3 13 0 3 14 0 3 15 0>;
0175 };
0176
0177 xlb@1f00 {
0178 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
0179 reg = <0x1f00 0x100>;
0180 };
0181
0182 psc1: psc@2000 { // PSC1
0183 compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
0184 reg = <0x2000 0x100>;
0185 interrupts = <2 1 0>;
0186 };
0187
0188 psc2: psc@2200 { // PSC2
0189 compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
0190 reg = <0x2200 0x100>;
0191 interrupts = <2 2 0>;
0192 };
0193
0194 psc3: psc@2400 { // PSC3
0195 compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
0196 reg = <0x2400 0x100>;
0197 interrupts = <2 3 0>;
0198 };
0199
0200 psc4: psc@2600 { // PSC4
0201 compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
0202 reg = <0x2600 0x100>;
0203 interrupts = <2 11 0>;
0204 };
0205
0206 psc5: psc@2800 { // PSC5
0207 compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
0208 reg = <0x2800 0x100>;
0209 interrupts = <2 12 0>;
0210 };
0211
0212 psc6: psc@2c00 { // PSC6
0213 compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
0214 reg = <0x2c00 0x100>;
0215 interrupts = <2 4 0>;
0216 };
0217
0218 eth0: ethernet@3000 {
0219 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
0220 reg = <0x3000 0x400>;
0221 local-mac-address = [ 00 00 00 00 00 00 ];
0222 interrupts = <2 5 0>;
0223 };
0224
0225 mdio@3000 {
0226 #address-cells = <1>;
0227 #size-cells = <0>;
0228 compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
0229 reg = <0x3000 0x400>; // fec range, since we need to setup fec interrupts
0230 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
0231 };
0232
0233 ata@3a00 {
0234 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
0235 reg = <0x3a00 0x100>;
0236 interrupts = <2 7 0>;
0237 };
0238
0239 sclpc@3c00 {
0240 compatible = "fsl,mpc5200-lpbfifo";
0241 reg = <0x3c00 0x60>;
0242 interrupts = <2 23 0>;
0243 };
0244
0245 i2c@3d00 {
0246 #address-cells = <1>;
0247 #size-cells = <0>;
0248 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
0249 reg = <0x3d00 0x40>;
0250 interrupts = <2 15 0>;
0251 };
0252
0253 i2c@3d40 {
0254 #address-cells = <1>;
0255 #size-cells = <0>;
0256 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
0257 reg = <0x3d40 0x40>;
0258 interrupts = <2 16 0>;
0259 };
0260
0261 sram@8000 {
0262 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
0263 reg = <0x8000 0x4000>;
0264 };
0265 };
0266
0267 pci: pci@f0000d00 {
0268 #interrupt-cells = <1>;
0269 #size-cells = <2>;
0270 #address-cells = <3>;
0271 device_type = "pci";
0272 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
0273 reg = <0xf0000d00 0x100>;
0274 // interrupt-map-mask = need to add
0275 // interrupt-map = need to add
0276 clock-frequency = <0>; // From boot loader
0277 interrupts = <2 8 0 2 9 0 2 10 0>;
0278 bus-range = <0 0>;
0279 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x10000000>,
0280 <0x02000000 0 0x90000000 0x90000000 0 0x10000000>,
0281 <0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
0282 };
0283
0284 localbus: localbus {
0285 compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus";
0286 #address-cells = <2>;
0287 #size-cells = <1>;
0288 ranges = <0 0 0xfc000000 0x2000000>;
0289 };
0290 };
