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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * MPC5121E ADS Device Tree Source
0004  *
0005  * Copyright 2007-2008 Freescale Semiconductor Inc.
0006  */
0007 
0008 #include "mpc5121.dtsi"
0009 
0010 / {
0011         model = "mpc5121ads";
0012         compatible = "fsl,mpc5121ads", "fsl,mpc5121";
0013 
0014         nfc@40000000 {
0015                 /*
0016                  * ADS has two Hynix 512MB Nand flash chips in a single
0017                  * stacked package.
0018                  */
0019                 chips = <2>;
0020 
0021                 nand@0 {
0022                         label = "nand";
0023                         reg = <0x00000000 0x40000000>;  /* 512MB + 512MB */
0024                 };
0025         };
0026 
0027         localbus@80000020 {
0028                 ranges = <0x0 0x0 0xfc000000 0x04000000
0029                           0x2 0x0 0x82000000 0x00008000>;
0030 
0031                 flash@0,0 {
0032                         compatible = "cfi-flash";
0033                         reg = <0 0x0 0x4000000>;
0034                         #address-cells = <1>;
0035                         #size-cells = <1>;
0036                         bank-width = <4>;
0037                         device-width = <2>;
0038 
0039                         protected@0 {
0040                                 label = "protected";
0041                                 reg = <0x00000000 0x00040000>;  // first sector is protected
0042                                 read-only;
0043                         };
0044                         filesystem@40000 {
0045                                 label = "filesystem";
0046                                 reg = <0x00040000 0x03c00000>;  // 60M for filesystem
0047                         };
0048                         kernel@3c40000 {
0049                                 label = "kernel";
0050                                 reg = <0x03c40000 0x00280000>;  // 2.5M for kernel
0051                         };
0052                         device-tree@3ec0000 {
0053                                 label = "device-tree";
0054                                 reg = <0x03ec0000 0x00040000>;  // one sector for device tree
0055                         };
0056                         u-boot@3f00000 {
0057                                 label = "u-boot";
0058                                 reg = <0x03f00000 0x00100000>;  // 1M for u-boot
0059                                 read-only;
0060                         };
0061                 };
0062 
0063                 board-control@2,0 {
0064                         compatible = "fsl,mpc5121ads-cpld";
0065                         reg = <0x2 0x0 0x8000>;
0066                 };
0067 
0068                 cpld_pic: pic@2,a {
0069                         compatible = "fsl,mpc5121ads-cpld-pic";
0070                         interrupt-controller;
0071                         #interrupt-cells = <2>;
0072                         reg = <0x2 0xa 0x5>;
0073                         /* irq routing:
0074                          * all irqs but touch screen are routed to irq0 (ipic 48)
0075                          * touch screen is statically routed to irq1 (ipic 17)
0076                          * so don't use it here
0077                          */
0078                         interrupts = <48 0x8>;
0079                 };
0080         };
0081 
0082         soc@80000000 {
0083 
0084                 i2c@1700 {
0085                         fsl,preserve-clocking;
0086 
0087                         hwmon@4a {
0088                                 compatible = "adi,ad7414";
0089                                 reg = <0x4a>;
0090                         };
0091 
0092                         eeprom@50 {
0093                                 compatible = "atmel,24c32";
0094                                 reg = <0x50>;
0095                         };
0096 
0097                         rtc@68 {
0098                                 compatible = "st,m41t62";
0099                                 reg = <0x68>;
0100                         };
0101                 };
0102 
0103                 eth0: ethernet@2800 {
0104                         phy-handle = <&phy0>;
0105                 };
0106 
0107                 can@2300 {
0108                         status = "disabled";
0109                 };
0110 
0111                 can@2380 {
0112                         status = "disabled";
0113                 };
0114 
0115                 viu@2400 {
0116                         status = "disabled";
0117                 };
0118 
0119                 mdio@2800 {
0120                         phy0: ethernet-phy@0 {
0121                                 reg = <1>;
0122                         };
0123                 };
0124 
0125                 /* mpc5121ads only uses USB0 */
0126                 usb@3000 {
0127                         status = "disabled";
0128                 };
0129 
0130                 /* USB0 using internal UTMI PHY */
0131                 usb@4000 {
0132                         dr_mode = "host";
0133                         fsl,invert-drvvbus;
0134                         fsl,invert-pwr-fault;
0135                 };
0136 
0137                 /* PSC3 serial port A aka ttyPSC0 */
0138                 psc@11300 {
0139                         compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
0140                 };
0141 
0142                 /* PSC4 serial port B aka ttyPSC1 */
0143                 psc@11400 {
0144                         compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
0145                 };
0146 
0147                 /* PSC5 in ac97 mode */
0148                 ac97: psc@11500 {
0149                         compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc";
0150                         fsl,mode = "ac97-slave";
0151                         fsl,rx-fifo-size = <384>;
0152                         fsl,tx-fifo-size = <384>;
0153                 };
0154         };
0155 
0156         pci: pci@80008500 {
0157                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0158                 interrupt-map = <
0159                                 /* IDSEL 0x15 - Slot 1 PCI */
0160                                  0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8
0161                                  0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8
0162                                  0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8
0163                                  0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8
0164 
0165                                 /* IDSEL 0x16 - Slot 2 MiniPCI */
0166                                  0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8
0167                                  0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8
0168 
0169                                 /* IDSEL 0x17 - Slot 3 MiniPCI */
0170                                  0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8
0171                                  0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8
0172                                 >;
0173         };
0174 };