0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * Device Tree for the MGCOGE plattform from keymile
0004 *
0005 * Copyright 2008 DENX Software Engineering GmbH
0006 * Heiko Schocher <hs@denx.de>
0007 */
0008
0009 /dts-v1/;
0010 / {
0011 model = "MGCOGE";
0012 compatible = "keymile,km82xx";
0013 #address-cells = <1>;
0014 #size-cells = <1>;
0015
0016 aliases {
0017 ethernet0 = ð0;
0018 serial0 = &smc2;
0019 };
0020
0021 cpus {
0022 #address-cells = <1>;
0023 #size-cells = <0>;
0024
0025 PowerPC,8247@0 {
0026 device_type = "cpu";
0027 reg = <0>;
0028 d-cache-line-size = <32>;
0029 i-cache-line-size = <32>;
0030 d-cache-size = <16384>;
0031 i-cache-size = <16384>;
0032 timebase-frequency = <0>; /* Filled in by U-Boot */
0033 clock-frequency = <0>; /* Filled in by U-Boot */
0034 bus-frequency = <0>; /* Filled in by U-Boot */
0035 };
0036 };
0037
0038 localbus@f0010100 {
0039 compatible = "fsl,mpc8247-localbus",
0040 "fsl,pq2-localbus",
0041 "simple-bus";
0042 #address-cells = <2>;
0043 #size-cells = <1>;
0044 reg = <0xf0010100 0x40>;
0045
0046 ranges = <0 0 0xfe000000 0x00400000
0047 1 0 0x30000000 0x00010000
0048 2 0 0x40000000 0x00010000
0049 5 0 0x50000000 0x04000000
0050 >;
0051
0052 flash@0,0 {
0053 compatible = "cfi-flash";
0054 reg = <0 0x0 0x400000>;
0055 #address-cells = <1>;
0056 #size-cells = <1>;
0057 bank-width = <1>;
0058 device-width = <1>;
0059 partition@0 {
0060 label = "u-boot";
0061 reg = <0x00000 0xC0000>;
0062 };
0063 partition@1 {
0064 label = "env";
0065 reg = <0xC0000 0x20000>;
0066 };
0067 partition@2 {
0068 label = "envred";
0069 reg = <0xE0000 0x20000>;
0070 };
0071 partition@3 {
0072 label = "free";
0073 reg = <0x100000 0x300000>;
0074 };
0075 };
0076
0077 flash@5,0 {
0078 compatible = "cfi-flash";
0079 reg = <5 0x00000000 0x02000000
0080 5 0x02000000 0x02000000>;
0081 #address-cells = <1>;
0082 #size-cells = <1>;
0083 bank-width = <2>;
0084 partition@app { /* 64 MBytes */
0085 label = "ubi0";
0086 reg = <0x00000000 0x04000000>;
0087 };
0088 };
0089 };
0090
0091 memory {
0092 device_type = "memory";
0093 reg = <0 0>; /* Filled in by U-Boot */
0094 };
0095
0096 soc@f0000000 {
0097 #address-cells = <1>;
0098 #size-cells = <1>;
0099 compatible = "fsl,mpc8247-immr", "fsl,pq2-soc", "simple-bus";
0100 ranges = <0x00000000 0xf0000000 0x00053000>;
0101
0102 // Temporary until code stops depending on it.
0103 device_type = "soc";
0104
0105 cpm@119c0 {
0106 #address-cells = <1>;
0107 #size-cells = <1>;
0108 #interrupt-cells = <2>;
0109 compatible = "fsl,mpc8247-cpm", "fsl,cpm2",
0110 "simple-bus";
0111 reg = <0x119c0 0x30>;
0112 ranges;
0113
0114 muram {
0115 compatible = "fsl,cpm-muram";
0116 #address-cells = <1>;
0117 #size-cells = <1>;
0118 ranges = <0 0 0x10000>;
0119
0120 data@0 {
0121 compatible = "fsl,cpm-muram-data";
0122 reg = <0x80 0x1f80 0x9800 0x800>;
0123 };
0124 };
0125
0126 brg@119f0 {
0127 compatible = "fsl,mpc8247-brg",
0128 "fsl,cpm2-brg",
0129 "fsl,cpm-brg";
0130 reg = <0x119f0 0x10 0x115f0 0x10>;
0131 };
0132
0133 /* Monitor port/SMC2 */
0134 smc2: serial@11a90 {
0135 device_type = "serial";
0136 compatible = "fsl,mpc8247-smc-uart",
0137 "fsl,cpm2-smc-uart";
0138 reg = <0x11a90 0x20 0x88fc 0x02>;
0139 interrupts = <5 8>;
0140 interrupt-parent = <&PIC>;
0141 fsl,cpm-brg = <2>;
0142 fsl,cpm-command = <0x21200000>;
0143 current-speed = <0>; /* Filled in by U-Boot */
0144 };
0145
0146 eth0: ethernet@11a60 {
0147 device_type = "network";
0148 compatible = "fsl,mpc8247-scc-enet",
0149 "fsl,cpm2-scc-enet";
0150 reg = <0x11a60 0x20 0x8300 0x100 0x11390 1>;
0151 local-mac-address = [ 00 00 00 00 00 00 ]; /* Filled in by U-Boot */
0152 interrupts = <43 8>;
0153 interrupt-parent = <&PIC>;
0154 linux,network-index = <0>;
0155 fsl,cpm-command = <0xce00000>;
0156 fixed-link = <0 0 10 0 0>;
0157 };
0158
0159 i2c@11860 {
0160 compatible = "fsl,mpc8272-i2c",
0161 "fsl,cpm2-i2c";
0162 reg = <0x11860 0x20 0x8afc 0x2>;
0163 interrupts = <1 8>;
0164 interrupt-parent = <&PIC>;
0165 fsl,cpm-command = <0x29600000>;
0166 #address-cells = <1>;
0167 #size-cells = <0>;
0168 };
0169
0170 mdio@10d40 {
0171 compatible = "fsl,cpm2-mdio-bitbang";
0172 reg = <0x10d00 0x14>;
0173 #address-cells = <1>;
0174 #size-cells = <0>;
0175 fsl,mdio-pin = <12>;
0176 fsl,mdc-pin = <13>;
0177
0178 phy0: ethernet-phy@0 {
0179 reg = <0x0>;
0180 };
0181
0182 phy1: ethernet-phy@1 {
0183 reg = <0x1>;
0184 };
0185 };
0186
0187 /* FCC1 management to switch */
0188 ethernet@11300 {
0189 device_type = "network";
0190 compatible = "fsl,cpm2-fcc-enet";
0191 reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
0192 local-mac-address = [ 00 01 02 03 04 07 ];
0193 interrupts = <32 8>;
0194 interrupt-parent = <&PIC>;
0195 phy-handle = <&phy0>;
0196 linux,network-index = <1>;
0197 fsl,cpm-command = <0x12000300>;
0198 };
0199
0200 /* FCC2 to redundant core unit over backplane */
0201 ethernet@11320 {
0202 device_type = "network";
0203 compatible = "fsl,cpm2-fcc-enet";
0204 reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
0205 local-mac-address = [ 00 01 02 03 04 08 ];
0206 interrupts = <33 8>;
0207 interrupt-parent = <&PIC>;
0208 phy-handle = <&phy1>;
0209 linux,network-index = <2>;
0210 fsl,cpm-command = <0x16200300>;
0211 };
0212
0213 usb@11b60 {
0214 compatible = "fsl,mpc8272-cpm-usb";
0215 mode = "peripheral";
0216 reg = <0x11b60 0x40 0x8b00 0x100>;
0217 interrupts = <11 8>;
0218 interrupt-parent = <&PIC>;
0219 usb-clock = <5>;
0220 };
0221 spi@11aa0 {
0222 cell-index = <0>;
0223 compatible = "fsl,spi", "fsl,cpm2-spi";
0224 reg = <0x11a80 0x40 0x89fc 0x2>;
0225 interrupts = <2 8>;
0226 interrupt-parent = <&PIC>;
0227 cs-gpios = < &cpm2_pio_d 19 0>;
0228 #address-cells = <1>;
0229 #size-cells = <0>;
0230 ds3106@1 {
0231 compatible = "gen,spidev";
0232 reg = <0>;
0233 spi-max-frequency = <8000000>;
0234 };
0235 };
0236
0237 };
0238
0239 cpm2_pio_d: gpio-controller@10d60 {
0240 #gpio-cells = <2>;
0241 compatible = "fsl,cpm2-pario-bank";
0242 reg = <0x10d60 0x14>;
0243 gpio-controller;
0244 };
0245
0246 cpm2_pio_c: gpio-controller@10d40 {
0247 #gpio-cells = <2>;
0248 compatible = "fsl,cpm2-pario-bank";
0249 reg = <0x10d40 0x14>;
0250 gpio-controller;
0251 };
0252
0253 PIC: interrupt-controller@10c00 {
0254 #interrupt-cells = <2>;
0255 interrupt-controller;
0256 reg = <0x10c00 0x80>;
0257 compatible = "fsl,mpc8247-pic", "fsl,pq2-pic";
0258 };
0259 };
0260 };
