0001 /*
0002 * Device Tree Source for AMCC Makalu (405EX)
0003 *
0004 * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
0005 *
0006 * This file is licensed under the terms of the GNU General Public
0007 * License version 2. This program is licensed "as is" without
0008 * any warranty of any kind, whether express or implied.
0009 */
0010
0011 /dts-v1/;
0012
0013 / {
0014 #address-cells = <1>;
0015 #size-cells = <1>;
0016 model = "amcc,makalu";
0017 compatible = "amcc,makalu";
0018 dcr-parent = <&{/cpus/cpu@0}>;
0019
0020 aliases {
0021 ethernet0 = &EMAC0;
0022 ethernet1 = &EMAC1;
0023 serial0 = &UART0;
0024 serial1 = &UART1;
0025 };
0026
0027 cpus {
0028 #address-cells = <1>;
0029 #size-cells = <0>;
0030
0031 cpu@0 {
0032 device_type = "cpu";
0033 model = "PowerPC,405EX";
0034 reg = <0x00000000>;
0035 clock-frequency = <0>; /* Filled in by U-Boot */
0036 timebase-frequency = <0>; /* Filled in by U-Boot */
0037 i-cache-line-size = <32>;
0038 d-cache-line-size = <32>;
0039 i-cache-size = <16384>; /* 16 kB */
0040 d-cache-size = <16384>; /* 16 kB */
0041 dcr-controller;
0042 dcr-access-method = "native";
0043 };
0044 };
0045
0046 memory {
0047 device_type = "memory";
0048 reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
0049 };
0050
0051 UIC0: interrupt-controller {
0052 compatible = "ibm,uic-405ex", "ibm,uic";
0053 interrupt-controller;
0054 cell-index = <0>;
0055 dcr-reg = <0x0c0 0x009>;
0056 #address-cells = <0>;
0057 #size-cells = <0>;
0058 #interrupt-cells = <2>;
0059 };
0060
0061 UIC1: interrupt-controller1 {
0062 compatible = "ibm,uic-405ex","ibm,uic";
0063 interrupt-controller;
0064 cell-index = <1>;
0065 dcr-reg = <0x0d0 0x009>;
0066 #address-cells = <0>;
0067 #size-cells = <0>;
0068 #interrupt-cells = <2>;
0069 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
0070 interrupt-parent = <&UIC0>;
0071 };
0072
0073 UIC2: interrupt-controller2 {
0074 compatible = "ibm,uic-405ex","ibm,uic";
0075 interrupt-controller;
0076 cell-index = <2>;
0077 dcr-reg = <0x0e0 0x009>;
0078 #address-cells = <0>;
0079 #size-cells = <0>;
0080 #interrupt-cells = <2>;
0081 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
0082 interrupt-parent = <&UIC0>;
0083 };
0084
0085 plb {
0086 compatible = "ibm,plb-405ex", "ibm,plb4";
0087 #address-cells = <1>;
0088 #size-cells = <1>;
0089 ranges;
0090 clock-frequency = <0>; /* Filled in by U-Boot */
0091
0092 SDRAM0: memory-controller {
0093 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
0094 dcr-reg = <0x010 0x002>;
0095 interrupt-parent = <&UIC2>;
0096 interrupts = <0x5 0x4 /* ECC DED Error */
0097 0x6 0x4 /* ECC SEC Error */ >;
0098 };
0099
0100 MAL0: mcmal {
0101 compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
0102 dcr-reg = <0x180 0x062>;
0103 num-tx-chans = <2>;
0104 num-rx-chans = <2>;
0105 interrupt-parent = <&MAL0>;
0106 interrupts = <0x0 0x1 0x2 0x3 0x4>;
0107 #interrupt-cells = <1>;
0108 #address-cells = <0>;
0109 #size-cells = <0>;
0110 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
0111 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
0112 /*SERR*/ 0x2 &UIC1 0x0 0x4
0113 /*TXDE*/ 0x3 &UIC1 0x1 0x4
0114 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
0115 interrupt-map-mask = <0xffffffff>;
0116 };
0117
0118 POB0: opb {
0119 compatible = "ibm,opb-405ex", "ibm,opb";
0120 #address-cells = <1>;
0121 #size-cells = <1>;
0122 ranges = <0x80000000 0x80000000 0x10000000
0123 0xef600000 0xef600000 0x00a00000
0124 0xf0000000 0xf0000000 0x10000000>;
0125 dcr-reg = <0x0a0 0x005>;
0126 clock-frequency = <0>; /* Filled in by U-Boot */
0127
0128 EBC0: ebc {
0129 compatible = "ibm,ebc-405ex", "ibm,ebc";
0130 dcr-reg = <0x012 0x002>;
0131 #address-cells = <2>;
0132 #size-cells = <1>;
0133 clock-frequency = <0>; /* Filled in by U-Boot */
0134 /* ranges property is supplied by U-Boot */
0135 interrupts = <0x5 0x1>;
0136 interrupt-parent = <&UIC1>;
0137
0138 nor_flash@0,0 {
0139 compatible = "amd,s29gl512n", "cfi-flash";
0140 bank-width = <2>;
0141 reg = <0x00000000 0x00000000 0x04000000>;
0142 #address-cells = <1>;
0143 #size-cells = <1>;
0144 partition@0 {
0145 label = "kernel";
0146 reg = <0x00000000 0x00200000>;
0147 };
0148 partition@200000 {
0149 label = "root";
0150 reg = <0x00200000 0x00200000>;
0151 };
0152 partition@400000 {
0153 label = "user";
0154 reg = <0x00400000 0x03b60000>;
0155 };
0156 partition@3f60000 {
0157 label = "env";
0158 reg = <0x03f60000 0x00040000>;
0159 };
0160 partition@3fa0000 {
0161 label = "u-boot";
0162 reg = <0x03fa0000 0x00060000>;
0163 };
0164 };
0165 };
0166
0167 UART0: serial@ef600200 {
0168 device_type = "serial";
0169 compatible = "ns16550";
0170 reg = <0xef600200 0x00000008>;
0171 virtual-reg = <0xef600200>;
0172 clock-frequency = <0>; /* Filled in by U-Boot */
0173 current-speed = <0>;
0174 interrupt-parent = <&UIC0>;
0175 interrupts = <0x1a 0x4>;
0176 };
0177
0178 UART1: serial@ef600300 {
0179 device_type = "serial";
0180 compatible = "ns16550";
0181 reg = <0xef600300 0x00000008>;
0182 virtual-reg = <0xef600300>;
0183 clock-frequency = <0>; /* Filled in by U-Boot */
0184 current-speed = <0>;
0185 interrupt-parent = <&UIC0>;
0186 interrupts = <0x1 0x4>;
0187 };
0188
0189 IIC0: i2c@ef600400 {
0190 compatible = "ibm,iic-405ex", "ibm,iic";
0191 reg = <0xef600400 0x00000014>;
0192 interrupt-parent = <&UIC0>;
0193 interrupts = <0x2 0x4>;
0194 };
0195
0196 IIC1: i2c@ef600500 {
0197 compatible = "ibm,iic-405ex", "ibm,iic";
0198 reg = <0xef600500 0x00000014>;
0199 interrupt-parent = <&UIC0>;
0200 interrupts = <0x7 0x4>;
0201 };
0202
0203
0204 RGMII0: emac-rgmii@ef600b00 {
0205 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
0206 reg = <0xef600b00 0x00000104>;
0207 has-mdio;
0208 };
0209
0210 EMAC0: ethernet@ef600900 {
0211 linux,network-index = <0x0>;
0212 device_type = "network";
0213 compatible = "ibm,emac-405ex", "ibm,emac4sync";
0214 interrupt-parent = <&EMAC0>;
0215 interrupts = <0x0 0x1>;
0216 #interrupt-cells = <1>;
0217 #address-cells = <0>;
0218 #size-cells = <0>;
0219 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
0220 /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
0221 reg = <0xef600900 0x000000c4>;
0222 local-mac-address = [000000000000]; /* Filled in by U-Boot */
0223 mal-device = <&MAL0>;
0224 mal-tx-channel = <0>;
0225 mal-rx-channel = <0>;
0226 cell-index = <0>;
0227 max-frame-size = <9000>;
0228 rx-fifo-size = <4096>;
0229 tx-fifo-size = <2048>;
0230 rx-fifo-size-gige = <16384>;
0231 tx-fifo-size-gige = <16384>;
0232 phy-mode = "rgmii";
0233 phy-map = <0x0000003f>; /* Start at 6 */
0234 rgmii-device = <&RGMII0>;
0235 rgmii-channel = <0>;
0236 has-inverted-stacr-oc;
0237 has-new-stacr-staopc;
0238 };
0239
0240 EMAC1: ethernet@ef600a00 {
0241 linux,network-index = <0x1>;
0242 device_type = "network";
0243 compatible = "ibm,emac-405ex", "ibm,emac4sync";
0244 interrupt-parent = <&EMAC1>;
0245 interrupts = <0x0 0x1>;
0246 #interrupt-cells = <1>;
0247 #address-cells = <0>;
0248 #size-cells = <0>;
0249 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
0250 /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
0251 reg = <0xef600a00 0x000000c4>;
0252 local-mac-address = [000000000000]; /* Filled in by U-Boot */
0253 mal-device = <&MAL0>;
0254 mal-tx-channel = <1>;
0255 mal-rx-channel = <1>;
0256 cell-index = <1>;
0257 max-frame-size = <9000>;
0258 rx-fifo-size = <4096>;
0259 tx-fifo-size = <2048>;
0260 rx-fifo-size-gige = <16384>;
0261 tx-fifo-size-gige = <16384>;
0262 phy-mode = "rgmii";
0263 phy-map = <0x00000000>;
0264 rgmii-device = <&RGMII0>;
0265 rgmii-channel = <1>;
0266 has-inverted-stacr-oc;
0267 has-new-stacr-staopc;
0268 };
0269 };
0270
0271 PCIE0: pcie@a0000000 {
0272 device_type = "pci";
0273 #interrupt-cells = <1>;
0274 #size-cells = <2>;
0275 #address-cells = <3>;
0276 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
0277 primary;
0278 port = <0x0>; /* port number */
0279 reg = <0xa0000000 0x20000000 /* Config space access */
0280 0xef000000 0x00001000>; /* Registers */
0281 dcr-reg = <0x040 0x020>;
0282 sdr-base = <0x400>;
0283
0284 /* Outbound ranges, one memory and one IO,
0285 * later cannot be changed
0286 */
0287 ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
0288 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
0289
0290 /* Inbound 2GB range starting at 0 */
0291 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
0292
0293 /* This drives busses 0x00 to 0x3f */
0294 bus-range = <0x0 0x3f>;
0295
0296 /* Legacy interrupts (note the weird polarity, the bridge seems
0297 * to invert PCIe legacy interrupts).
0298 * We are de-swizzling here because the numbers are actually for
0299 * port of the root complex virtual P2P bridge. But I want
0300 * to avoid putting a node for it in the tree, so the numbers
0301 * below are basically de-swizzled numbers.
0302 * The real slot is on idsel 0, so the swizzling is 1:1
0303 */
0304 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
0305 interrupt-map = <
0306 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
0307 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
0308 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
0309 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
0310 };
0311
0312 PCIE1: pcie@c0000000 {
0313 device_type = "pci";
0314 #interrupt-cells = <1>;
0315 #size-cells = <2>;
0316 #address-cells = <3>;
0317 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
0318 primary;
0319 port = <0x1>; /* port number */
0320 reg = <0xc0000000 0x20000000 /* Config space access */
0321 0xef001000 0x00001000>; /* Registers */
0322 dcr-reg = <0x060 0x020>;
0323 sdr-base = <0x440>;
0324
0325 /* Outbound ranges, one memory and one IO,
0326 * later cannot be changed
0327 */
0328 ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000
0329 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>;
0330
0331 /* Inbound 2GB range starting at 0 */
0332 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
0333
0334 /* This drives busses 0x40 to 0x7f */
0335 bus-range = <0x40 0x7f>;
0336
0337 /* Legacy interrupts (note the weird polarity, the bridge seems
0338 * to invert PCIe legacy interrupts).
0339 * We are de-swizzling here because the numbers are actually for
0340 * port of the root complex virtual P2P bridge. But I want
0341 * to avoid putting a node for it in the tree, so the numbers
0342 * below are basically de-swizzled numbers.
0343 * The real slot is on idsel 0, so the swizzling is 1:1
0344 */
0345 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
0346 interrupt-map = <
0347 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */
0348 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */
0349 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
0350 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
0351 };
0352 };
0353 };
