0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * Lite5200B board Device Tree Source
0004 *
0005 * Copyright 2006-2007 Secret Lab Technologies Ltd.
0006 * Grant Likely <grant.likely@secretlab.ca>
0007 */
0008
0009 /include/ "mpc5200b.dtsi"
0010
0011 &gpt0 { fsl,has-wdt; };
0012 &gpt2 { gpio-controller; };
0013 &gpt3 { gpio-controller; };
0014
0015 / {
0016 model = "fsl,lite5200b";
0017 compatible = "fsl,lite5200b";
0018
0019 leds {
0020 compatible = "gpio-leds";
0021 tmr2 {
0022 gpios = <&gpt2 0 1>;
0023 };
0024 tmr3 {
0025 gpios = <&gpt3 0 1>;
0026 linux,default-trigger = "heartbeat";
0027 };
0028 led1 { gpios = <&gpio_wkup 2 1>; };
0029 led2 { gpios = <&gpio_simple 3 1>; };
0030 led3 { gpios = <&gpio_wkup 3 1>; };
0031 led4 { gpios = <&gpio_simple 2 1>; };
0032 };
0033
0034 memory@0 {
0035 reg = <0x00000000 0x10000000>; // 256MB
0036 };
0037
0038 soc5200@f0000000 {
0039 psc@2000 { // PSC1
0040 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
0041 cell-index = <0>;
0042 };
0043
0044 psc@2200 { // PSC2
0045 status = "disabled";
0046 };
0047
0048 psc@2400 { // PSC3
0049 status = "disabled";
0050 };
0051
0052 psc@2600 { // PSC4
0053 status = "disabled";
0054 };
0055
0056 psc@2800 { // PSC5
0057 status = "disabled";
0058 };
0059
0060 psc@2c00 { // PSC6
0061 status = "disabled";
0062 };
0063
0064 // PSC2 in ac97 mode example
0065 //ac97@2200 { // PSC2
0066 // compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
0067 // cell-index = <1>;
0068 //};
0069
0070 // PSC3 in CODEC mode example
0071 //i2s@2400 { // PSC3
0072 // compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
0073 // cell-index = <2>;
0074 //};
0075
0076 // PSC6 in spi mode example
0077 //spi@2c00 { // PSC6
0078 // compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
0079 // cell-index = <5>;
0080 //};
0081
0082 ethernet@3000 {
0083 phy-handle = <&phy0>;
0084 };
0085
0086 mdio@3000 {
0087 phy0: ethernet-phy@0 {
0088 reg = <0>;
0089 };
0090 };
0091
0092 i2c@3d40 {
0093 eeprom@50 {
0094 compatible = "atmel,24c02";
0095 reg = <0x50>;
0096 };
0097 };
0098
0099 sram@8000 {
0100 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
0101 reg = <0x8000 0x4000>;
0102 };
0103 };
0104
0105 pci@f0000d00 {
0106 interrupt-map-mask = <0xf800 0 0 7>;
0107 interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
0108 0xc000 0 0 2 &mpc5200_pic 1 1 3
0109 0xc000 0 0 3 &mpc5200_pic 1 2 3
0110 0xc000 0 0 4 &mpc5200_pic 1 3 3
0111
0112 0xc800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
0113 0xc800 0 0 2 &mpc5200_pic 1 2 3
0114 0xc800 0 0 3 &mpc5200_pic 1 3 3
0115 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
0116 clock-frequency = <0>; // From boot loader
0117 interrupts = <2 8 0 2 9 0 2 10 0>;
0118 bus-range = <0 0>;
0119 ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000>,
0120 <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000>,
0121 <0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
0122 };
0123
0124 localbus {
0125 ranges = <0 0 0xfe000000 0x02000000>;
0126
0127 flash@0,0 {
0128 compatible = "cfi-flash";
0129 reg = <0 0 0x02000000>;
0130 bank-width = <1>;
0131 #size-cells = <1>;
0132 #address-cells = <1>;
0133
0134 partition@0 {
0135 label = "kernel";
0136 reg = <0x00000000 0x00200000>;
0137 };
0138 partition@200000 {
0139 label = "rootfs";
0140 reg = <0x00200000 0x01d00000>;
0141 };
0142 partition@1f00000 {
0143 label = "u-boot";
0144 reg = <0x01f00000 0x00060000>;
0145 };
0146 partition@1f60000 {
0147 label = "u-boot-env";
0148 reg = <0x01f60000 0x00020000>;
0149 };
0150 partition@1f80000 {
0151 label = "dtb";
0152 reg = <0x01f80000 0x00080000>;
0153 };
0154 };
0155 };
0156
0157 };
