0001 /*
0002 * Device Tree Source for AMCC Kilauea (405EX)
0003 *
0004 * Copyright 2007-2009 DENX Software Engineering, Stefan Roese <sr@denx.de>
0005 *
0006 * This file is licensed under the terms of the GNU General Public
0007 * License version 2. This program is licensed "as is" without
0008 * any warranty of any kind, whether express or implied.
0009 */
0010
0011 /dts-v1/;
0012
0013 / {
0014 #address-cells = <1>;
0015 #size-cells = <1>;
0016 model = "amcc,kilauea";
0017 compatible = "amcc,kilauea";
0018 dcr-parent = <&{/cpus/cpu@0}>;
0019
0020 aliases {
0021 ethernet0 = &EMAC0;
0022 ethernet1 = &EMAC1;
0023 serial0 = &UART0;
0024 serial1 = &UART1;
0025 };
0026
0027 cpus {
0028 #address-cells = <1>;
0029 #size-cells = <0>;
0030
0031 cpu@0 {
0032 device_type = "cpu";
0033 model = "PowerPC,405EX";
0034 reg = <0x00000000>;
0035 clock-frequency = <0>; /* Filled in by U-Boot */
0036 timebase-frequency = <0>; /* Filled in by U-Boot */
0037 i-cache-line-size = <32>;
0038 d-cache-line-size = <32>;
0039 i-cache-size = <16384>; /* 16 kB */
0040 d-cache-size = <16384>; /* 16 kB */
0041 dcr-controller;
0042 dcr-access-method = "native";
0043 };
0044 };
0045
0046 memory {
0047 device_type = "memory";
0048 reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
0049 };
0050
0051 UIC0: interrupt-controller {
0052 compatible = "ibm,uic-405ex", "ibm,uic";
0053 interrupt-controller;
0054 cell-index = <0>;
0055 dcr-reg = <0x0c0 0x009>;
0056 #address-cells = <0>;
0057 #size-cells = <0>;
0058 #interrupt-cells = <2>;
0059 };
0060
0061 UIC1: interrupt-controller1 {
0062 compatible = "ibm,uic-405ex","ibm,uic";
0063 interrupt-controller;
0064 cell-index = <1>;
0065 dcr-reg = <0x0d0 0x009>;
0066 #address-cells = <0>;
0067 #size-cells = <0>;
0068 #interrupt-cells = <2>;
0069 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
0070 interrupt-parent = <&UIC0>;
0071 };
0072
0073 UIC2: interrupt-controller2 {
0074 compatible = "ibm,uic-405ex","ibm,uic";
0075 interrupt-controller;
0076 cell-index = <2>;
0077 dcr-reg = <0x0e0 0x009>;
0078 #address-cells = <0>;
0079 #size-cells = <0>;
0080 #interrupt-cells = <2>;
0081 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
0082 interrupt-parent = <&UIC0>;
0083 };
0084
0085 CPM0: cpm {
0086 compatible = "ibm,cpm";
0087 dcr-access-method = "native";
0088 dcr-reg = <0x0b0 0x003>;
0089 unused-units = <0x00000000>;
0090 idle-doze = <0x02000000>;
0091 standby = <0xe3e74800>;
0092 };
0093
0094 plb {
0095 compatible = "ibm,plb-405ex", "ibm,plb4";
0096 #address-cells = <1>;
0097 #size-cells = <1>;
0098 ranges;
0099 clock-frequency = <0>; /* Filled in by U-Boot */
0100
0101 SDRAM0: memory-controller {
0102 compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
0103 dcr-reg = <0x010 0x002>;
0104 interrupt-parent = <&UIC2>;
0105 interrupts = <0x5 0x4 /* ECC DED Error */
0106 0x6 0x4>; /* ECC SEC Error */
0107 };
0108
0109 CRYPTO: crypto@ef700000 {
0110 compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto";
0111 reg = <0xef700000 0x80400>;
0112 interrupt-parent = <&UIC0>;
0113 interrupts = <0x17 0x2>;
0114 };
0115
0116 MAL0: mcmal {
0117 compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
0118 dcr-reg = <0x180 0x062>;
0119 num-tx-chans = <2>;
0120 num-rx-chans = <2>;
0121 interrupt-parent = <&MAL0>;
0122 interrupts = <0x0 0x1 0x2 0x3 0x4>;
0123 #interrupt-cells = <1>;
0124 #address-cells = <0>;
0125 #size-cells = <0>;
0126 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
0127 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
0128 /*SERR*/ 0x2 &UIC1 0x0 0x4
0129 /*TXDE*/ 0x3 &UIC1 0x1 0x4
0130 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
0131 interrupt-map-mask = <0xffffffff>;
0132 };
0133
0134 POB0: opb {
0135 compatible = "ibm,opb-405ex", "ibm,opb";
0136 #address-cells = <1>;
0137 #size-cells = <1>;
0138 ranges = <0x80000000 0x80000000 0x10000000
0139 0xef600000 0xef600000 0x00a00000
0140 0xf0000000 0xf0000000 0x10000000>;
0141 dcr-reg = <0x0a0 0x005>;
0142 clock-frequency = <0>; /* Filled in by U-Boot */
0143
0144 EBC0: ebc {
0145 compatible = "ibm,ebc-405ex", "ibm,ebc";
0146 dcr-reg = <0x012 0x002>;
0147 #address-cells = <2>;
0148 #size-cells = <1>;
0149 clock-frequency = <0>; /* Filled in by U-Boot */
0150 /* ranges property is supplied by U-Boot */
0151 interrupts = <0x5 0x1>;
0152 interrupt-parent = <&UIC1>;
0153
0154 nor_flash@0,0 {
0155 compatible = "amd,s29gl512n", "cfi-flash";
0156 bank-width = <2>;
0157 reg = <0x00000000 0x00000000 0x04000000>;
0158 #address-cells = <1>;
0159 #size-cells = <1>;
0160 partition@0 {
0161 label = "kernel";
0162 reg = <0x00000000 0x001e0000>;
0163 };
0164 partition@1e0000 {
0165 label = "dtb";
0166 reg = <0x001e0000 0x00020000>;
0167 };
0168 partition@200000 {
0169 label = "root";
0170 reg = <0x00200000 0x00200000>;
0171 };
0172 partition@400000 {
0173 label = "user";
0174 reg = <0x00400000 0x03b60000>;
0175 };
0176 partition@3f60000 {
0177 label = "env";
0178 reg = <0x03f60000 0x00040000>;
0179 };
0180 partition@3fa0000 {
0181 label = "u-boot";
0182 reg = <0x03fa0000 0x00060000>;
0183 };
0184 };
0185
0186 ndfc@1,0 {
0187 compatible = "ibm,ndfc";
0188 reg = <0x00000001 0x00000000 0x00002000>;
0189 ccr = <0x00001000>;
0190 bank-settings = <0x80002222>;
0191 #address-cells = <1>;
0192 #size-cells = <1>;
0193
0194 nand {
0195 #address-cells = <1>;
0196 #size-cells = <1>;
0197
0198 partition@0 {
0199 label = "u-boot";
0200 reg = <0x00000000 0x00100000>;
0201 };
0202 partition@100000 {
0203 label = "user";
0204 reg = <0x00000000 0x03f00000>;
0205 };
0206 };
0207 };
0208 };
0209
0210 UART0: serial@ef600200 {
0211 device_type = "serial";
0212 compatible = "ns16550";
0213 reg = <0xef600200 0x00000008>;
0214 virtual-reg = <0xef600200>;
0215 clock-frequency = <0>; /* Filled in by U-Boot */
0216 current-speed = <0>;
0217 interrupt-parent = <&UIC0>;
0218 interrupts = <0x1a 0x4>;
0219 };
0220
0221 UART1: serial@ef600300 {
0222 device_type = "serial";
0223 compatible = "ns16550";
0224 reg = <0xef600300 0x00000008>;
0225 virtual-reg = <0xef600300>;
0226 clock-frequency = <0>; /* Filled in by U-Boot */
0227 current-speed = <0>;
0228 interrupt-parent = <&UIC0>;
0229 interrupts = <0x1 0x4>;
0230 };
0231
0232 IIC0: i2c@ef600400 {
0233 compatible = "ibm,iic-405ex", "ibm,iic";
0234 reg = <0xef600400 0x00000014>;
0235 interrupt-parent = <&UIC0>;
0236 interrupts = <0x2 0x4>;
0237 #address-cells = <1>;
0238 #size-cells = <0>;
0239
0240 rtc@68 {
0241 compatible = "dallas,ds1338";
0242 reg = <0x68>;
0243 };
0244
0245 dtt@48 {
0246 compatible = "dallas,ds1775";
0247 reg = <0x48>;
0248 };
0249 };
0250
0251 IIC1: i2c@ef600500 {
0252 compatible = "ibm,iic-405ex", "ibm,iic";
0253 reg = <0xef600500 0x00000014>;
0254 interrupt-parent = <&UIC0>;
0255 interrupts = <0x7 0x4>;
0256 };
0257
0258 RGMII0: emac-rgmii@ef600b00 {
0259 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
0260 reg = <0xef600b00 0x00000104>;
0261 has-mdio;
0262 };
0263
0264 EMAC0: ethernet@ef600900 {
0265 linux,network-index = <0x0>;
0266 device_type = "network";
0267 compatible = "ibm,emac-405ex", "ibm,emac4sync";
0268 interrupt-parent = <&EMAC0>;
0269 interrupts = <0x0 0x1>;
0270 #interrupt-cells = <1>;
0271 #address-cells = <0>;
0272 #size-cells = <0>;
0273 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
0274 /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
0275 reg = <0xef600900 0x000000c4>;
0276 local-mac-address = [000000000000]; /* Filled in by U-Boot */
0277 mal-device = <&MAL0>;
0278 mal-tx-channel = <0>;
0279 mal-rx-channel = <0>;
0280 cell-index = <0>;
0281 max-frame-size = <9000>;
0282 rx-fifo-size = <4096>;
0283 tx-fifo-size = <2048>;
0284 rx-fifo-size-gige = <16384>;
0285 tx-fifo-size-gige = <16384>;
0286 phy-mode = "rgmii";
0287 phy-map = <0x00000000>;
0288 rgmii-device = <&RGMII0>;
0289 rgmii-channel = <0>;
0290 has-inverted-stacr-oc;
0291 has-new-stacr-staopc;
0292 };
0293
0294 EMAC1: ethernet@ef600a00 {
0295 linux,network-index = <0x1>;
0296 device_type = "network";
0297 compatible = "ibm,emac-405ex", "ibm,emac4sync";
0298 interrupt-parent = <&EMAC1>;
0299 interrupts = <0x0 0x1>;
0300 #interrupt-cells = <1>;
0301 #address-cells = <0>;
0302 #size-cells = <0>;
0303 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
0304 /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
0305 reg = <0xef600a00 0x000000c4>;
0306 local-mac-address = [000000000000]; /* Filled in by U-Boot */
0307 mal-device = <&MAL0>;
0308 mal-tx-channel = <1>;
0309 mal-rx-channel = <1>;
0310 cell-index = <1>;
0311 max-frame-size = <9000>;
0312 rx-fifo-size = <4096>;
0313 tx-fifo-size = <2048>;
0314 rx-fifo-size-gige = <16384>;
0315 tx-fifo-size-gige = <16384>;
0316 phy-mode = "rgmii";
0317 phy-map = <0x00000000>;
0318 rgmii-device = <&RGMII0>;
0319 rgmii-channel = <1>;
0320 has-inverted-stacr-oc;
0321 has-new-stacr-staopc;
0322 };
0323 };
0324
0325 PCIE0: pcie@a0000000 {
0326 device_type = "pci";
0327 #interrupt-cells = <1>;
0328 #size-cells = <2>;
0329 #address-cells = <3>;
0330 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
0331 primary;
0332 port = <0x0>; /* port number */
0333 reg = <0xa0000000 0x20000000 /* Config space access */
0334 0xef000000 0x00001000>; /* Registers */
0335 dcr-reg = <0x040 0x020>;
0336 sdr-base = <0x400>;
0337
0338 /* Outbound ranges, one memory and one IO,
0339 * later cannot be changed
0340 */
0341 ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
0342 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
0343
0344 /* Inbound 2GB range starting at 0 */
0345 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
0346
0347 /* This drives busses 0x00 to 0x3f */
0348 bus-range = <0x0 0x3f>;
0349
0350 /* Legacy interrupts (note the weird polarity, the bridge seems
0351 * to invert PCIe legacy interrupts).
0352 * We are de-swizzling here because the numbers are actually for
0353 * port of the root complex virtual P2P bridge. But I want
0354 * to avoid putting a node for it in the tree, so the numbers
0355 * below are basically de-swizzled numbers.
0356 * The real slot is on idsel 0, so the swizzling is 1:1
0357 */
0358 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
0359 interrupt-map = <
0360 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
0361 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
0362 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
0363 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
0364 };
0365
0366 PCIE1: pcie@c0000000 {
0367 device_type = "pci";
0368 #interrupt-cells = <1>;
0369 #size-cells = <2>;
0370 #address-cells = <3>;
0371 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
0372 primary;
0373 port = <0x1>; /* port number */
0374 reg = <0xc0000000 0x20000000 /* Config space access */
0375 0xef001000 0x00001000>; /* Registers */
0376 dcr-reg = <0x060 0x020>;
0377 sdr-base = <0x440>;
0378
0379 /* Outbound ranges, one memory and one IO,
0380 * later cannot be changed
0381 */
0382 ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000
0383 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>;
0384
0385 /* Inbound 2GB range starting at 0 */
0386 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
0387
0388 /* This drives busses 0x40 to 0x7f */
0389 bus-range = <0x40 0x7f>;
0390
0391 /* Legacy interrupts (note the weird polarity, the bridge seems
0392 * to invert PCIe legacy interrupts).
0393 * We are de-swizzling here because the numbers are actually for
0394 * port of the root complex virtual P2P bridge. But I want
0395 * to avoid putting a node for it in the tree, so the numbers
0396 * below are basically de-swizzled numbers.
0397 * The real slot is on idsel 0, so the swizzling is 1:1
0398 */
0399 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
0400 interrupt-map = <
0401 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */
0402 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */
0403 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
0404 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
0405 };
0406 };
0407 };
