0001 /*
0002 * Device Tree Source for AMCC Katmai eval board
0003 *
0004 * Copyright (c) 2006, 2007 IBM Corp.
0005 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
0006 *
0007 * Copyright (c) 2006, 2007 IBM Corp.
0008 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
0009 *
0010 * This file is licensed under the terms of the GNU General Public
0011 * License version 2. This program is licensed "as is" without
0012 * any warranty of any kind, whether express or implied.
0013 */
0014
0015 /dts-v1/;
0016
0017 / {
0018 #address-cells = <2>;
0019 #size-cells = <2>;
0020 model = "amcc,katmai";
0021 compatible = "amcc,katmai";
0022 dcr-parent = <&{/cpus/cpu@0}>;
0023
0024 aliases {
0025 ethernet0 = &EMAC0;
0026 serial0 = &UART0;
0027 serial1 = &UART1;
0028 serial2 = &UART2;
0029 };
0030
0031 cpus {
0032 #address-cells = <1>;
0033 #size-cells = <0>;
0034
0035 cpu@0 {
0036 device_type = "cpu";
0037 model = "PowerPC,440SPe";
0038 reg = <0x00000000>;
0039 clock-frequency = <0>; /* Filled in by zImage */
0040 timebase-frequency = <0>; /* Filled in by zImage */
0041 i-cache-line-size = <32>;
0042 d-cache-line-size = <32>;
0043 i-cache-size = <32768>;
0044 d-cache-size = <32768>;
0045 dcr-controller;
0046 dcr-access-method = "native";
0047 reset-type = <2>; /* Use chip-reset */
0048 };
0049 };
0050
0051 memory {
0052 device_type = "memory";
0053 reg = <0x0 0x00000000 0x0 0x00000000>; /* Filled in by U-Boot */
0054 };
0055
0056 UIC0: interrupt-controller0 {
0057 compatible = "ibm,uic-440spe","ibm,uic";
0058 interrupt-controller;
0059 cell-index = <0>;
0060 dcr-reg = <0x0c0 0x009>;
0061 #address-cells = <0>;
0062 #size-cells = <0>;
0063 #interrupt-cells = <2>;
0064 };
0065
0066 UIC1: interrupt-controller1 {
0067 compatible = "ibm,uic-440spe","ibm,uic";
0068 interrupt-controller;
0069 cell-index = <1>;
0070 dcr-reg = <0x0d0 0x009>;
0071 #address-cells = <0>;
0072 #size-cells = <0>;
0073 #interrupt-cells = <2>;
0074 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
0075 interrupt-parent = <&UIC0>;
0076 };
0077
0078 UIC2: interrupt-controller2 {
0079 compatible = "ibm,uic-440spe","ibm,uic";
0080 interrupt-controller;
0081 cell-index = <2>;
0082 dcr-reg = <0x0e0 0x009>;
0083 #address-cells = <0>;
0084 #size-cells = <0>;
0085 #interrupt-cells = <2>;
0086 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
0087 interrupt-parent = <&UIC0>;
0088 };
0089
0090 UIC3: interrupt-controller3 {
0091 compatible = "ibm,uic-440spe","ibm,uic";
0092 interrupt-controller;
0093 cell-index = <3>;
0094 dcr-reg = <0x0f0 0x009>;
0095 #address-cells = <0>;
0096 #size-cells = <0>;
0097 #interrupt-cells = <2>;
0098 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
0099 interrupt-parent = <&UIC0>;
0100 };
0101
0102 SDR0: sdr {
0103 compatible = "ibm,sdr-440spe";
0104 dcr-reg = <0x00e 0x002>;
0105 };
0106
0107 CPR0: cpr {
0108 compatible = "ibm,cpr-440spe";
0109 dcr-reg = <0x00c 0x002>;
0110 };
0111
0112 MQ0: mq {
0113 compatible = "ibm,mq-440spe";
0114 dcr-reg = <0x040 0x020>;
0115 };
0116
0117 plb {
0118 compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4";
0119 #address-cells = <2>;
0120 #size-cells = <1>;
0121 /* addr-child addr-parent size */
0122 ranges = <0x4 0x00100000 0x4 0x00100000 0x00001000
0123 0x4 0x00200000 0x4 0x00200000 0x00000400
0124 0x4 0xe0000000 0x4 0xe0000000 0x20000000
0125 0xc 0x00000000 0xc 0x00000000 0x20000000
0126 0xd 0x00000000 0xd 0x00000000 0x80000000
0127 0xd 0x80000000 0xd 0x80000000 0x80000000
0128 0xe 0x00000000 0xe 0x00000000 0x80000000
0129 0xe 0x80000000 0xe 0x80000000 0x80000000
0130 0xf 0x00000000 0xf 0x00000000 0x80000000
0131 0xf 0x80000000 0xf 0x80000000 0x80000000>;
0132 clock-frequency = <0>; /* Filled in by zImage */
0133
0134 SDRAM0: sdram {
0135 compatible = "ibm,sdram-440spe", "ibm,sdram-405gp";
0136 dcr-reg = <0x010 0x002>;
0137 };
0138
0139 MAL0: mcmal {
0140 compatible = "ibm,mcmal-440spe", "ibm,mcmal2";
0141 dcr-reg = <0x180 0x062>;
0142 num-tx-chans = <2>;
0143 num-rx-chans = <1>;
0144 interrupt-parent = <&MAL0>;
0145 interrupts = <0x0 0x1 0x2 0x3 0x4>;
0146 #interrupt-cells = <1>;
0147 #address-cells = <0>;
0148 #size-cells = <0>;
0149 interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4
0150 /*RXEOB*/ 0x1 &UIC1 0x7 0x4
0151 /*SERR*/ 0x2 &UIC1 0x1 0x4
0152 /*TXDE*/ 0x3 &UIC1 0x2 0x4
0153 /*RXDE*/ 0x4 &UIC1 0x3 0x4>;
0154 };
0155
0156 POB0: opb {
0157 compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
0158 #address-cells = <1>;
0159 #size-cells = <1>;
0160 ranges = <0xe0000000 0x00000004 0xe0000000 0x20000000>;
0161 clock-frequency = <0>; /* Filled in by zImage */
0162
0163 EBC0: ebc {
0164 compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc";
0165 dcr-reg = <0x012 0x002>;
0166 #address-cells = <2>;
0167 #size-cells = <1>;
0168 clock-frequency = <0>; /* Filled in by zImage */
0169 /* ranges property is supplied by U-Boot */
0170 interrupts = <0x5 0x1>;
0171 interrupt-parent = <&UIC1>;
0172
0173 nor_flash@0,0 {
0174 compatible = "cfi-flash";
0175 bank-width = <2>;
0176 reg = <0x00000000 0x00000000 0x01000000>;
0177 #address-cells = <1>;
0178 #size-cells = <1>;
0179 partition@0 {
0180 label = "kernel";
0181 reg = <0x00000000 0x001e0000>;
0182 };
0183 partition@1e0000 {
0184 label = "dtb";
0185 reg = <0x001e0000 0x00020000>;
0186 };
0187 partition@200000 {
0188 label = "root";
0189 reg = <0x00200000 0x00200000>;
0190 };
0191 partition@400000 {
0192 label = "user";
0193 reg = <0x00400000 0x00b60000>;
0194 };
0195 partition@f60000 {
0196 label = "env";
0197 reg = <0x00f60000 0x00040000>;
0198 };
0199 partition@fa0000 {
0200 label = "u-boot";
0201 reg = <0x00fa0000 0x00060000>;
0202 };
0203 };
0204 };
0205
0206 UART0: serial@f0000200 {
0207 device_type = "serial";
0208 compatible = "ns16550";
0209 reg = <0xf0000200 0x00000008>;
0210 virtual-reg = <0xa0000200>;
0211 clock-frequency = <0>; /* Filled in by zImage */
0212 current-speed = <115200>;
0213 interrupt-parent = <&UIC0>;
0214 interrupts = <0x0 0x4>;
0215 };
0216
0217 UART1: serial@f0000300 {
0218 device_type = "serial";
0219 compatible = "ns16550";
0220 reg = <0xf0000300 0x00000008>;
0221 virtual-reg = <0xa0000300>;
0222 clock-frequency = <0>;
0223 current-speed = <0>;
0224 interrupt-parent = <&UIC0>;
0225 interrupts = <0x1 0x4>;
0226 };
0227
0228
0229 UART2: serial@f0000600 {
0230 device_type = "serial";
0231 compatible = "ns16550";
0232 reg = <0xf0000600 0x00000008>;
0233 virtual-reg = <0xa0000600>;
0234 clock-frequency = <0>;
0235 current-speed = <0>;
0236 interrupt-parent = <&UIC1>;
0237 interrupts = <0x5 0x4>;
0238 };
0239
0240 IIC0: i2c@f0000400 {
0241 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
0242 reg = <0xf0000400 0x00000014>;
0243 interrupt-parent = <&UIC0>;
0244 interrupts = <0x2 0x4>;
0245 };
0246
0247 IIC1: i2c@f0000500 {
0248 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
0249 reg = <0xf0000500 0x00000014>;
0250 interrupt-parent = <&UIC0>;
0251 interrupts = <0x3 0x4>;
0252 };
0253
0254 EMAC0: ethernet@f0000800 {
0255 linux,network-index = <0x0>;
0256 device_type = "network";
0257 compatible = "ibm,emac-440spe", "ibm,emac4";
0258 interrupt-parent = <&UIC1>;
0259 interrupts = <0x1c 0x4 0x1d 0x4>;
0260 reg = <0xf0000800 0x00000074>;
0261 local-mac-address = [000000000000];
0262 mal-device = <&MAL0>;
0263 mal-tx-channel = <0>;
0264 mal-rx-channel = <0>;
0265 cell-index = <0>;
0266 max-frame-size = <9000>;
0267 rx-fifo-size = <4096>;
0268 tx-fifo-size = <2048>;
0269 phy-mode = "gmii";
0270 phy-map = <0x00000000>;
0271 has-inverted-stacr-oc;
0272 has-new-stacr-staopc;
0273 };
0274 };
0275
0276 PCIX0: pci@c0ec00000 {
0277 device_type = "pci";
0278 #interrupt-cells = <1>;
0279 #size-cells = <2>;
0280 #address-cells = <3>;
0281 compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix";
0282 primary;
0283 large-inbound-windows;
0284 enable-msi-hole;
0285 reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
0286 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
0287 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
0288 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
0289 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
0290
0291 /* Outbound ranges, one memory and one IO,
0292 * later cannot be changed
0293 */
0294 ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
0295 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
0296
0297 /* Inbound 4GB range starting at 0 */
0298 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
0299
0300 /* This drives busses 0 to 0xf */
0301 bus-range = <0x0 0xf>;
0302
0303 /*
0304 * On Katmai, the following PCI-X interrupts signals
0305 * have to be enabled via jumpers (only INTA is
0306 * enabled per default):
0307 *
0308 * INTB: J3: 1-2
0309 * INTC: J2: 1-2
0310 * INTD: J1: 1-2
0311 */
0312 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0313 interrupt-map = <
0314 /* IDSEL 1 */
0315 0x800 0x0 0x0 0x1 &UIC1 0x14 0x8
0316 0x800 0x0 0x0 0x2 &UIC1 0x13 0x8
0317 0x800 0x0 0x0 0x3 &UIC1 0x12 0x8
0318 0x800 0x0 0x0 0x4 &UIC1 0x11 0x8
0319 >;
0320 };
0321
0322 PCIE0: pcie@d00000000 {
0323 device_type = "pci";
0324 #interrupt-cells = <1>;
0325 #size-cells = <2>;
0326 #address-cells = <3>;
0327 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
0328 primary;
0329 port = <0x0>; /* port number */
0330 reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
0331 0x0000000c 0x10000000 0x00001000>; /* Registers */
0332 dcr-reg = <0x100 0x020>;
0333 sdr-base = <0x300>;
0334
0335 /* Outbound ranges, one memory and one IO,
0336 * later cannot be changed
0337 */
0338 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
0339 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
0340
0341 /* Inbound 4GB range starting at 0 */
0342 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
0343
0344 /* This drives busses 0x10 to 0x1f */
0345 bus-range = <0x10 0x1f>;
0346
0347 /* Legacy interrupts (note the weird polarity, the bridge seems
0348 * to invert PCIe legacy interrupts).
0349 * We are de-swizzling here because the numbers are actually for
0350 * port of the root complex virtual P2P bridge. But I want
0351 * to avoid putting a node for it in the tree, so the numbers
0352 * below are basically de-swizzled numbers.
0353 * The real slot is on idsel 0, so the swizzling is 1:1
0354 */
0355 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
0356 interrupt-map = <
0357 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */
0358 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */
0359 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */
0360 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>;
0361 };
0362
0363 PCIE1: pcie@d20000000 {
0364 device_type = "pci";
0365 #interrupt-cells = <1>;
0366 #size-cells = <2>;
0367 #address-cells = <3>;
0368 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
0369 primary;
0370 port = <0x1>; /* port number */
0371 reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
0372 0x0000000c 0x10001000 0x00001000>; /* Registers */
0373 dcr-reg = <0x120 0x020>;
0374 sdr-base = <0x340>;
0375
0376 /* Outbound ranges, one memory and one IO,
0377 * later cannot be changed
0378 */
0379 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
0380 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
0381
0382 /* Inbound 4GB range starting at 0 */
0383 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
0384
0385 /* This drives busses 0x20 to 0x2f */
0386 bus-range = <0x20 0x2f>;
0387
0388 /* Legacy interrupts (note the weird polarity, the bridge seems
0389 * to invert PCIe legacy interrupts).
0390 * We are de-swizzling here because the numbers are actually for
0391 * port of the root complex virtual P2P bridge. But I want
0392 * to avoid putting a node for it in the tree, so the numbers
0393 * below are basically de-swizzled numbers.
0394 * The real slot is on idsel 0, so the swizzling is 1:1
0395 */
0396 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
0397 interrupt-map = <
0398 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */
0399 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */
0400 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */
0401 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>;
0402 };
0403
0404 PCIE2: pcie@d40000000 {
0405 device_type = "pci";
0406 #interrupt-cells = <1>;
0407 #size-cells = <2>;
0408 #address-cells = <3>;
0409 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
0410 primary;
0411 port = <0x2>; /* port number */
0412 reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */
0413 0x0000000c 0x10002000 0x00001000>; /* Registers */
0414 dcr-reg = <0x140 0x020>;
0415 sdr-base = <0x370>;
0416
0417 /* Outbound ranges, one memory and one IO,
0418 * later cannot be changed
0419 */
0420 ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000
0421 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>;
0422
0423 /* Inbound 4GB range starting at 0 */
0424 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x1 0x00000000>;
0425
0426 /* This drives busses 0x30 to 0x3f */
0427 bus-range = <0x30 0x3f>;
0428
0429 /* Legacy interrupts (note the weird polarity, the bridge seems
0430 * to invert PCIe legacy interrupts).
0431 * We are de-swizzling here because the numbers are actually for
0432 * port of the root complex virtual P2P bridge. But I want
0433 * to avoid putting a node for it in the tree, so the numbers
0434 * below are basically de-swizzled numbers.
0435 * The real slot is on idsel 0, so the swizzling is 1:1
0436 */
0437 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
0438 interrupt-map = <
0439 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */
0440 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */
0441 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */
0442 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>;
0443 };
0444
0445 I2O: i2o@400100000 {
0446 compatible = "ibm,i2o-440spe";
0447 reg = <0x00000004 0x00100000 0x100>;
0448 dcr-reg = <0x060 0x020>;
0449 };
0450
0451 DMA0: dma0@400100100 {
0452 compatible = "ibm,dma-440spe";
0453 cell-index = <0>;
0454 reg = <0x00000004 0x00100100 0x100>;
0455 dcr-reg = <0x060 0x020>;
0456 interrupt-parent = <&DMA0>;
0457 interrupts = <0 1>;
0458 #interrupt-cells = <1>;
0459 #address-cells = <0>;
0460 #size-cells = <0>;
0461 interrupt-map = <
0462 0 &UIC0 0x14 4
0463 1 &UIC1 0x16 4>;
0464 };
0465
0466 DMA1: dma1@400100200 {
0467 compatible = "ibm,dma-440spe";
0468 cell-index = <1>;
0469 reg = <0x00000004 0x00100200 0x100>;
0470 dcr-reg = <0x060 0x020>;
0471 interrupt-parent = <&DMA1>;
0472 interrupts = <0 1>;
0473 #interrupt-cells = <1>;
0474 #address-cells = <0>;
0475 #size-cells = <0>;
0476 interrupt-map = <
0477 0 &UIC0 0x16 4
0478 1 &UIC1 0x16 4>;
0479 };
0480
0481 xor-accel@400200000 {
0482 compatible = "amcc,xor-accelerator";
0483 reg = <0x00000004 0x00200000 0x400>;
0484 interrupt-parent = <&UIC1>;
0485 interrupts = <0x1f 4>;
0486 };
0487 };
0488
0489 chosen {
0490 stdout-path = "/plb/opb/serial@f0000200";
0491 };
0492 };
