0001 /*
0002 * Device Tree Source for ESTeem 195E Hotfoot
0003 *
0004 * Copyright 2009 AbsoluteValue Systems <solomon@linux-wlan.com>
0005 *
0006 * This file is licensed under the terms of the GNU General Public
0007 * License version 2. This program is licensed "as is" without
0008 * any warranty of any kind, whether express or implied.
0009 */
0010
0011 /dts-v1/;
0012
0013 / {
0014 #address-cells = <1>;
0015 #size-cells = <1>;
0016 model = "est,hotfoot";
0017 compatible = "est,hotfoot";
0018 dcr-parent = <&{/cpus/cpu@0}>;
0019
0020 aliases {
0021 ethernet0 = &EMAC0;
0022 ethernet1 = &EMAC1;
0023 serial0 = &UART0;
0024 serial1 = &UART1;
0025 };
0026
0027 cpus {
0028 #address-cells = <1>;
0029 #size-cells = <0>;
0030
0031 cpu@0 {
0032 device_type = "cpu";
0033 model = "PowerPC,405EP";
0034 reg = <0x00000000>;
0035 clock-frequency = <0>; /* Filled in by zImage */
0036 timebase-frequency = <0>; /* Filled in by zImage */
0037 i-cache-line-size = <0x20>;
0038 d-cache-line-size = <0x20>;
0039 i-cache-size = <0x4000>;
0040 d-cache-size = <0x4000>;
0041 dcr-controller;
0042 dcr-access-method = "native";
0043 };
0044 };
0045
0046 memory {
0047 device_type = "memory";
0048 reg = <0x00000000 0x00000000>; /* Filled in by zImage */
0049 };
0050
0051 UIC0: interrupt-controller {
0052 compatible = "ibm,uic";
0053 interrupt-controller;
0054 cell-index = <0>;
0055 dcr-reg = <0x0c0 0x009>;
0056 #address-cells = <0>;
0057 #size-cells = <0>;
0058 #interrupt-cells = <2>;
0059 };
0060
0061 plb {
0062 compatible = "ibm,plb3";
0063 #address-cells = <1>;
0064 #size-cells = <1>;
0065 ranges;
0066 clock-frequency = <0>; /* Filled in by zImage */
0067
0068 SDRAM0: memory-controller {
0069 compatible = "ibm,sdram-405ep";
0070 dcr-reg = <0x010 0x002>;
0071 };
0072
0073 MAL: mcmal {
0074 compatible = "ibm,mcmal-405ep", "ibm,mcmal";
0075 dcr-reg = <0x180 0x062>;
0076 num-tx-chans = <4>;
0077 num-rx-chans = <2>;
0078 interrupt-parent = <&UIC0>;
0079 interrupts = <
0080 0xb 0x4 /* TXEOB */
0081 0xc 0x4 /* RXEOB */
0082 0xa 0x4 /* SERR */
0083 0xd 0x4 /* TXDE */
0084 0xe 0x4 /* RXDE */>;
0085 };
0086
0087 POB0: opb {
0088 compatible = "ibm,opb-405ep", "ibm,opb";
0089 #address-cells = <1>;
0090 #size-cells = <1>;
0091 ranges = <0xef600000 0xef600000 0x00a00000>;
0092 dcr-reg = <0x0a0 0x005>;
0093 clock-frequency = <0>; /* Filled in by zImage */
0094
0095 /* Hotfoot has UART0/UART1 swapped */
0096
0097 UART0: serial@ef600400 {
0098 device_type = "serial";
0099 compatible = "ns16550";
0100 reg = <0xef600400 0x00000008>;
0101 virtual-reg = <0xef600400>;
0102 clock-frequency = <0>; /* Filled in by zImage */
0103 current-speed = <0x9600>;
0104 interrupt-parent = <&UIC0>;
0105 interrupts = <0x1 0x4>;
0106 };
0107
0108 UART1: serial@ef600300 {
0109 device_type = "serial";
0110 compatible = "ns16550";
0111 reg = <0xef600300 0x00000008>;
0112 virtual-reg = <0xef600300>;
0113 clock-frequency = <0>; /* Filled in by zImage */
0114 current-speed = <0x9600>;
0115 interrupt-parent = <&UIC0>;
0116 interrupts = <0x0 0x4>;
0117 };
0118
0119 IIC: i2c@ef600500 {
0120 #address-cells = <1>;
0121 #size-cells = <0>;
0122 compatible = "ibm,iic-405ep", "ibm,iic";
0123 reg = <0xef600500 0x00000011>;
0124 interrupt-parent = <&UIC0>;
0125 interrupts = <0x2 0x4>;
0126
0127 rtc@68 {
0128 /* Actually a DS1339 */
0129 compatible = "dallas,ds1307";
0130 reg = <0x68>;
0131 };
0132
0133 temp@4a {
0134 /* Not present on all boards */
0135 compatible = "national,lm75";
0136 reg = <0x4a>;
0137 };
0138 };
0139
0140 GPIO: gpio@ef600700 {
0141 #gpio-cells = <2>;
0142 compatible = "ibm,ppc4xx-gpio";
0143 reg = <0xef600700 0x00000020>;
0144 gpio-controller;
0145 };
0146
0147 gpio-leds {
0148 compatible = "gpio-leds";
0149 status {
0150 label = "Status";
0151 gpios = <&GPIO 1 0>;
0152 };
0153 radiorx {
0154 label = "Rx";
0155 gpios = <&GPIO 0xe 0>;
0156 };
0157 };
0158
0159 EMAC0: ethernet@ef600800 {
0160 linux,network-index = <0x0>;
0161 device_type = "network";
0162 compatible = "ibm,emac-405ep", "ibm,emac";
0163 interrupt-parent = <&UIC0>;
0164 interrupts = <
0165 0xf 0x4 /* Ethernet */
0166 0x9 0x4 /* Ethernet Wake Up */>;
0167 local-mac-address = [000000000000]; /* Filled in by zImage */
0168 reg = <0xef600800 0x00000070>;
0169 mal-device = <&MAL>;
0170 mal-tx-channel = <0>;
0171 mal-rx-channel = <0>;
0172 cell-index = <0>;
0173 max-frame-size = <0x5dc>;
0174 rx-fifo-size = <0x1000>;
0175 tx-fifo-size = <0x800>;
0176 phy-mode = "mii";
0177 phy-map = <0x00000000>;
0178 };
0179
0180 EMAC1: ethernet@ef600900 {
0181 linux,network-index = <0x1>;
0182 device_type = "network";
0183 compatible = "ibm,emac-405ep", "ibm,emac";
0184 interrupt-parent = <&UIC0>;
0185 interrupts = <
0186 0x11 0x4 /* Ethernet */
0187 0x9 0x4 /* Ethernet Wake Up */>;
0188 local-mac-address = [000000000000]; /* Filled in by zImage */
0189 reg = <0xef600900 0x00000070>;
0190 mal-device = <&MAL>;
0191 mal-tx-channel = <2>;
0192 mal-rx-channel = <1>;
0193 cell-index = <1>;
0194 max-frame-size = <0x5dc>;
0195 rx-fifo-size = <0x1000>;
0196 tx-fifo-size = <0x800>;
0197 mdio-device = <&EMAC0>;
0198 phy-mode = "mii";
0199 phy-map = <0x0000001>;
0200 };
0201 };
0202
0203 EBC0: ebc {
0204 compatible = "ibm,ebc-405ep", "ibm,ebc";
0205 dcr-reg = <0x012 0x002>;
0206 #address-cells = <2>;
0207 #size-cells = <1>;
0208
0209 /* The ranges property is supplied by the bootwrapper
0210 * and is based on the firmware's configuration of the
0211 * EBC bridge
0212 */
0213 clock-frequency = <0>; /* Filled in by zImage */
0214
0215 nor_flash@0 {
0216 compatible = "cfi-flash";
0217 bank-width = <2>;
0218 reg = <0x0 0xff800000 0x00800000>;
0219 #address-cells = <1>;
0220 #size-cells = <1>;
0221
0222 /* This mapping is for the 8M flash
0223 4M flash has all ofssets -= 4M,
0224 and FeatFS partition is not present */
0225 partition@0 {
0226 label = "Bootloader";
0227 reg = <0x7c0000 0x40000>;
0228 /* read-only; */
0229 };
0230 partition@1 {
0231 label = "Env_and_Config_Primary";
0232 reg = <0x400000 0x10000>;
0233 };
0234 partition@2 {
0235 label = "Kernel";
0236 reg = <0x420000 0x100000>;
0237 };
0238 partition@3 {
0239 label = "Filesystem";
0240 reg = <0x520000 0x2a0000>;
0241 };
0242 partition@4 {
0243 label = "Env_and_Config_Secondary";
0244 reg = <0x410000 0x10000>;
0245 };
0246 partition@5 {
0247 label = "FeatFS";
0248 reg = <0x000000 0x400000>;
0249 };
0250 partition@6 {
0251 label = "Bootloader_Env";
0252 reg = <0x7d0000 0x10000>;
0253 };
0254 };
0255 };
0256
0257 PCI0: pci@ec000000 {
0258 device_type = "pci";
0259 #interrupt-cells = <1>;
0260 #size-cells = <2>;
0261 #address-cells = <3>;
0262 compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
0263 primary;
0264 reg = <0xeec00000 0x00000008 /* Config space access */
0265 0xeed80000 0x00000004 /* IACK */
0266 0xeed80000 0x00000004 /* Special cycle */
0267 0xef480000 0x00000040>; /* Internal registers */
0268
0269 /* Outbound ranges, one memory and one IO,
0270 * later cannot be changed. Chip supports a second
0271 * IO range but we don't use it for now
0272 */
0273 ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
0274 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
0275
0276 /* Inbound 2GB range starting at 0 */
0277 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
0278
0279 interrupt-parent = <&UIC0>;
0280 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0281 interrupt-map = <
0282 /* IDSEL 3 -- slot1 (optional) 27/29 A/B IRQ2/4 */
0283 0x1800 0x0 0x0 0x1 &UIC0 0x1b 0x8
0284 0x1800 0x0 0x0 0x2 &UIC0 0x1d 0x8
0285
0286 /* IDSEL 4 -- slot0, 26/28 A/B IRQ1/3 */
0287 0x2000 0x0 0x0 0x1 &UIC0 0x1a 0x8
0288 0x2000 0x0 0x0 0x2 &UIC0 0x1c 0x8
0289 >;
0290 };
0291 };
0292
0293 chosen {
0294 stdout-path = &UART0;
0295 };
0296 };
