0001 /*
0002 * Device Tree Source for AMCC Haleakala (405EXr)
0003 *
0004 * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
0005 *
0006 * This file is licensed under the terms of the GNU General Public
0007 * License version 2. This program is licensed "as is" without
0008 * any warranty of any kind, whether express or implied.
0009 */
0010
0011 /dts-v1/;
0012
0013 / {
0014 #address-cells = <1>;
0015 #size-cells = <1>;
0016 model = "amcc,haleakala";
0017 compatible = "amcc,haleakala", "amcc,kilauea";
0018 dcr-parent = <&{/cpus/cpu@0}>;
0019
0020 aliases {
0021 ethernet0 = &EMAC0;
0022 serial0 = &UART0;
0023 serial1 = &UART1;
0024 };
0025
0026 cpus {
0027 #address-cells = <1>;
0028 #size-cells = <0>;
0029
0030 cpu@0 {
0031 device_type = "cpu";
0032 model = "PowerPC,405EXr";
0033 reg = <0x00000000>;
0034 clock-frequency = <0>; /* Filled in by U-Boot */
0035 timebase-frequency = <0>; /* Filled in by U-Boot */
0036 i-cache-line-size = <32>;
0037 d-cache-line-size = <32>;
0038 i-cache-size = <16384>; /* 16 kB */
0039 d-cache-size = <16384>; /* 16 kB */
0040 dcr-controller;
0041 dcr-access-method = "native";
0042 };
0043 };
0044
0045 memory {
0046 device_type = "memory";
0047 reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
0048 };
0049
0050 UIC0: interrupt-controller {
0051 compatible = "ibm,uic-405exr", "ibm,uic";
0052 interrupt-controller;
0053 cell-index = <0>;
0054 dcr-reg = <0x0c0 0x009>;
0055 #address-cells = <0>;
0056 #size-cells = <0>;
0057 #interrupt-cells = <2>;
0058 };
0059
0060 UIC1: interrupt-controller1 {
0061 compatible = "ibm,uic-405exr","ibm,uic";
0062 interrupt-controller;
0063 cell-index = <1>;
0064 dcr-reg = <0x0d0 0x009>;
0065 #address-cells = <0>;
0066 #size-cells = <0>;
0067 #interrupt-cells = <2>;
0068 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
0069 interrupt-parent = <&UIC0>;
0070 };
0071
0072 UIC2: interrupt-controller2 {
0073 compatible = "ibm,uic-405exr","ibm,uic";
0074 interrupt-controller;
0075 cell-index = <2>;
0076 dcr-reg = <0x0e0 0x009>;
0077 #address-cells = <0>;
0078 #size-cells = <0>;
0079 #interrupt-cells = <2>;
0080 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
0081 interrupt-parent = <&UIC0>;
0082 };
0083
0084 plb {
0085 compatible = "ibm,plb-405exr", "ibm,plb4";
0086 #address-cells = <1>;
0087 #size-cells = <1>;
0088 ranges;
0089 clock-frequency = <0>; /* Filled in by U-Boot */
0090
0091 SDRAM0: memory-controller {
0092 compatible = "ibm,sdram-405exr", "ibm,sdram-4xx-ddr2";
0093 dcr-reg = <0x010 0x002>;
0094 interrupt-parent = <&UIC2>;
0095 interrupts = <0x5 0x4 /* ECC DED Error */
0096 0x6 0x4>; /* ECC SEC Error */
0097 };
0098
0099 MAL0: mcmal {
0100 compatible = "ibm,mcmal-405exr", "ibm,mcmal2";
0101 dcr-reg = <0x180 0x062>;
0102 num-tx-chans = <2>;
0103 num-rx-chans = <2>;
0104 interrupt-parent = <&MAL0>;
0105 interrupts = <0x0 0x1 0x2 0x3 0x4>;
0106 #interrupt-cells = <1>;
0107 #address-cells = <0>;
0108 #size-cells = <0>;
0109 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
0110 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
0111 /*SERR*/ 0x2 &UIC1 0x0 0x4
0112 /*TXDE*/ 0x3 &UIC1 0x1 0x4
0113 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
0114 interrupt-map-mask = <0xffffffff>;
0115 };
0116
0117 POB0: opb {
0118 compatible = "ibm,opb-405exr", "ibm,opb";
0119 #address-cells = <1>;
0120 #size-cells = <1>;
0121 ranges = <0x80000000 0x80000000 0x10000000
0122 0xef600000 0xef600000 0x00a00000
0123 0xf0000000 0xf0000000 0x10000000>;
0124 dcr-reg = <0x0a0 0x005>;
0125 clock-frequency = <0>; /* Filled in by U-Boot */
0126
0127 EBC0: ebc {
0128 compatible = "ibm,ebc-405exr", "ibm,ebc";
0129 dcr-reg = <0x012 0x002>;
0130 #address-cells = <2>;
0131 #size-cells = <1>;
0132 clock-frequency = <0>; /* Filled in by U-Boot */
0133 /* ranges property is supplied by U-Boot */
0134 interrupts = <0x5 0x1>;
0135 interrupt-parent = <&UIC1>;
0136
0137 nor_flash@0,0 {
0138 compatible = "amd,s29gl512n", "cfi-flash";
0139 bank-width = <2>;
0140 reg = <0x00000000 0x00000000 0x04000000>;
0141 #address-cells = <1>;
0142 #size-cells = <1>;
0143 partition@0 {
0144 label = "kernel";
0145 reg = <0x00000000 0x00200000>;
0146 };
0147 partition@200000 {
0148 label = "root";
0149 reg = <0x00200000 0x00200000>;
0150 };
0151 partition@400000 {
0152 label = "user";
0153 reg = <0x00400000 0x03b60000>;
0154 };
0155 partition@3f60000 {
0156 label = "env";
0157 reg = <0x03f60000 0x00040000>;
0158 };
0159 partition@3fa0000 {
0160 label = "u-boot";
0161 reg = <0x03fa0000 0x00060000>;
0162 };
0163 };
0164 };
0165
0166 UART0: serial@ef600200 {
0167 device_type = "serial";
0168 compatible = "ns16550";
0169 reg = <0xef600200 0x00000008>;
0170 virtual-reg = <0xef600200>;
0171 clock-frequency = <0>; /* Filled in by U-Boot */
0172 current-speed = <0>;
0173 interrupt-parent = <&UIC0>;
0174 interrupts = <0x1a 0x4>;
0175 };
0176
0177 UART1: serial@ef600300 {
0178 device_type = "serial";
0179 compatible = "ns16550";
0180 reg = <0xef600300 0x00000008>;
0181 virtual-reg = <0xef600300>;
0182 clock-frequency = <0>; /* Filled in by U-Boot */
0183 current-speed = <0>;
0184 interrupt-parent = <&UIC0>;
0185 interrupts = <0x1 0x4>;
0186 };
0187
0188 IIC0: i2c@ef600400 {
0189 compatible = "ibm,iic-405exr", "ibm,iic";
0190 reg = <0xef600400 0x00000014>;
0191 interrupt-parent = <&UIC0>;
0192 interrupts = <0x2 0x4>;
0193 };
0194
0195 IIC1: i2c@ef600500 {
0196 compatible = "ibm,iic-405exr", "ibm,iic";
0197 reg = <0xef600500 0x00000014>;
0198 interrupt-parent = <&UIC0>;
0199 interrupts = <0x7 0x4>;
0200 };
0201
0202
0203 RGMII0: emac-rgmii@ef600b00 {
0204 compatible = "ibm,rgmii-405exr", "ibm,rgmii";
0205 reg = <0xef600b00 0x00000104>;
0206 has-mdio;
0207 };
0208
0209 EMAC0: ethernet@ef600900 {
0210 linux,network-index = <0x0>;
0211 device_type = "network";
0212 compatible = "ibm,emac-405exr", "ibm,emac4sync";
0213 interrupt-parent = <&EMAC0>;
0214 interrupts = <0x0 0x1>;
0215 #interrupt-cells = <1>;
0216 #address-cells = <0>;
0217 #size-cells = <0>;
0218 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
0219 /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
0220 reg = <0xef600900 0x000000c4>;
0221 local-mac-address = [000000000000]; /* Filled in by U-Boot */
0222 mal-device = <&MAL0>;
0223 mal-tx-channel = <0>;
0224 mal-rx-channel = <0>;
0225 cell-index = <0>;
0226 max-frame-size = <9000>;
0227 rx-fifo-size = <4096>;
0228 tx-fifo-size = <2048>;
0229 rx-fifo-size-gige = <16384>;
0230 tx-fifo-size-gige = <16384>;
0231 phy-mode = "rgmii";
0232 phy-map = <0x00000000>;
0233 rgmii-device = <&RGMII0>;
0234 rgmii-channel = <0>;
0235 has-inverted-stacr-oc;
0236 has-new-stacr-staopc;
0237 };
0238 };
0239
0240 PCIE0: pcie@a0000000 {
0241 device_type = "pci";
0242 #interrupt-cells = <1>;
0243 #size-cells = <2>;
0244 #address-cells = <3>;
0245 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
0246 primary;
0247 port = <0x0>; /* port number */
0248 reg = <0xa0000000 0x20000000 /* Config space access */
0249 0xef000000 0x00001000>; /* Registers */
0250 dcr-reg = <0x040 0x020>;
0251 sdr-base = <0x400>;
0252
0253 /* Outbound ranges, one memory and one IO,
0254 * later cannot be changed
0255 */
0256 ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
0257 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
0258
0259 /* Inbound 2GB range starting at 0 */
0260 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
0261
0262 /* This drives busses 0x00 to 0x3f */
0263 bus-range = <0x0 0x3f>;
0264
0265 /* Legacy interrupts (note the weird polarity, the bridge seems
0266 * to invert PCIe legacy interrupts).
0267 * We are de-swizzling here because the numbers are actually for
0268 * port of the root complex virtual P2P bridge. But I want
0269 * to avoid putting a node for it in the tree, so the numbers
0270 * below are basically de-swizzled numbers.
0271 * The real slot is on idsel 0, so the swizzling is 1:1
0272 */
0273 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
0274 interrupt-map = <
0275 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
0276 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
0277 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
0278 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
0279 };
0280 };
0281 };
