0001 /*
0002 * T2080PCIe-RDB Board Device Tree Source
0003 *
0004 * Copyright 2014 Freescale Semiconductor Inc.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions are met:
0008 * * Redistributions of source code must retain the above copyright
0009 * notice, this list of conditions and the following disclaimer.
0010 * * Redistributions in binary form must reproduce the above copyright
0011 * notice, this list of conditions and the following disclaimer in the
0012 * documentation and/or other materials provided with the distribution.
0013 * * Neither the name of Freescale Semiconductor nor the
0014 * names of its contributors may be used to endorse or promote products
0015 * derived from this software without specific prior written permission.
0016 *
0017 *
0018 * ALTERNATIVELY, this software may be distributed under the terms of the
0019 * GNU General Public License ("GPL") as published by the Free Software
0020 * Foundation, either version 2 of that License or (at your option) any
0021 * later version.
0022 *
0023 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
0024 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0025 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0026 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0027 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0028 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0029 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0030 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0031 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0032 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0033 */
0034
0035 / {
0036 model = "fsl,T2080RDB";
0037 compatible = "fsl,T2080RDB";
0038 #address-cells = <2>;
0039 #size-cells = <2>;
0040 interrupt-parent = <&mpic>;
0041
0042 reserved-memory {
0043 #address-cells = <2>;
0044 #size-cells = <2>;
0045 ranges;
0046
0047 bman_fbpr: bman-fbpr {
0048 size = <0 0x1000000>;
0049 alignment = <0 0x1000000>;
0050 };
0051 qman_fqd: qman-fqd {
0052 size = <0 0x400000>;
0053 alignment = <0 0x400000>;
0054 };
0055 qman_pfdr: qman-pfdr {
0056 size = <0 0x2000000>;
0057 alignment = <0 0x2000000>;
0058 };
0059 };
0060
0061 ifc: localbus@ffe124000 {
0062 reg = <0xf 0xfe124000 0 0x2000>;
0063 ranges = <0 0 0xf 0xe8000000 0x08000000
0064 2 0 0xf 0xff800000 0x00010000
0065 3 0 0xf 0xffdf0000 0x00008000>;
0066
0067 nor@0,0 {
0068 #address-cells = <1>;
0069 #size-cells = <1>;
0070 compatible = "cfi-flash";
0071 reg = <0x0 0x0 0x8000000>;
0072
0073 bank-width = <2>;
0074 device-width = <1>;
0075 };
0076
0077 nand@1,0 {
0078 #address-cells = <1>;
0079 #size-cells = <1>;
0080 compatible = "fsl,ifc-nand";
0081 reg = <0x2 0x0 0x10000>;
0082 };
0083
0084 boardctrl: board-control@2,0 {
0085 #address-cells = <1>;
0086 #size-cells = <1>;
0087 compatible = "fsl,t2080-cpld";
0088 reg = <3 0 0x300>;
0089 ranges = <0 3 0 0x300>;
0090 };
0091 };
0092
0093 memory {
0094 device_type = "memory";
0095 };
0096
0097 dcsr: dcsr@f00000000 {
0098 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
0099 };
0100
0101 bportals: bman-portals@ff4000000 {
0102 ranges = <0x0 0xf 0xf4000000 0x2000000>;
0103 };
0104
0105 qportals: qman-portals@ff6000000 {
0106 ranges = <0x0 0xf 0xf6000000 0x2000000>;
0107 };
0108
0109 soc: soc@ffe000000 {
0110 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
0111 reg = <0xf 0xfe000000 0 0x00001000>;
0112 spi@110000 {
0113 flash@0 {
0114 #address-cells = <1>;
0115 #size-cells = <1>;
0116 compatible = "micron,n25q512ax3", "jedec,spi-nor";
0117 reg = <0>;
0118 spi-max-frequency = <10000000>; /* input clock */
0119 };
0120 };
0121
0122 i2c@118000 {
0123 adt7481@4c {
0124 compatible = "adi,adt7481";
0125 reg = <0x4c>;
0126 };
0127
0128 rtc@68 {
0129 compatible = "dallas,ds1339";
0130 reg = <0x68>;
0131 interrupts = <0x1 0x1 0 0>;
0132 };
0133
0134 eeprom@50 {
0135 compatible = "atmel,24c256";
0136 reg = <0x50>;
0137 };
0138 };
0139
0140 i2c@118100 {
0141 pca9546@77 {
0142 compatible = "nxp,pca9546";
0143 reg = <0x77>;
0144 };
0145 };
0146
0147 sdhc@114000 {
0148 voltage-ranges = <1800 1800 3300 3300>;
0149 };
0150 };
0151
0152 pci0: pcie@ffe240000 {
0153 reg = <0xf 0xfe240000 0 0x10000>;
0154 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
0155 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
0156 pcie@0 {
0157 ranges = <0x02000000 0 0xe0000000
0158 0x02000000 0 0xe0000000
0159 0 0x20000000
0160
0161 0x01000000 0 0x00000000
0162 0x01000000 0 0x00000000
0163 0 0x00010000>;
0164 };
0165 };
0166
0167 pci1: pcie@ffe250000 {
0168 reg = <0xf 0xfe250000 0 0x10000>;
0169 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x10000000
0170 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
0171 pcie@0 {
0172 ranges = <0x02000000 0 0xe0000000
0173 0x02000000 0 0xe0000000
0174 0 0x20000000
0175
0176 0x01000000 0 0x00000000
0177 0x01000000 0 0x00000000
0178 0 0x00010000>;
0179 };
0180 };
0181
0182 pci2: pcie@ffe260000 {
0183 reg = <0xf 0xfe260000 0 0x1000>;
0184 ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000
0185 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
0186 pcie@0 {
0187 ranges = <0x02000000 0 0xe0000000
0188 0x02000000 0 0xe0000000
0189 0 0x20000000
0190
0191 0x01000000 0 0x00000000
0192 0x01000000 0 0x00000000
0193 0 0x00010000>;
0194 };
0195 };
0196
0197 pci3: pcie@ffe270000 {
0198 reg = <0xf 0xfe270000 0 0x10000>;
0199 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x10000000
0200 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
0201 pcie@0 {
0202 ranges = <0x02000000 0 0xe0000000
0203 0x02000000 0 0xe0000000
0204 0 0x20000000
0205
0206 0x01000000 0 0x00000000
0207 0x01000000 0 0x00000000
0208 0 0x00010000>;
0209 };
0210 };
0211 };
