0001 /*
0002 * T2080QDS Device Tree Source
0003 *
0004 * Copyright 2013 - 2015 Freescale Semiconductor Inc.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions are met:
0008 * * Redistributions of source code must retain the above copyright
0009 * notice, this list of conditions and the following disclaimer.
0010 * * Redistributions in binary form must reproduce the above copyright
0011 * notice, this list of conditions and the following disclaimer in the
0012 * documentation and/or other materials provided with the distribution.
0013 * * Neither the name of Freescale Semiconductor nor the
0014 * names of its contributors may be used to endorse or promote products
0015 * derived from this software without specific prior written permission.
0016 *
0017 *
0018 * ALTERNATIVELY, this software may be distributed under the terms of the
0019 * GNU General Public License ("GPL") as published by the Free Software
0020 * Foundation, either version 2 of that License or (at your option) any
0021 * later version.
0022 *
0023 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
0024 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0025 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0026 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0027 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0028 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0029 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0030 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0031 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0032 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0033 */
0034
0035 /include/ "t208xsi-pre.dtsi"
0036 /include/ "t208xqds.dtsi"
0037
0038 / {
0039 model = "fsl,T2080QDS";
0040 compatible = "fsl,T2080QDS";
0041 #address-cells = <2>;
0042 #size-cells = <2>;
0043 interrupt-parent = <&mpic>;
0044
0045 aliases {
0046 emi1_slot1 = &t2080mdio2;
0047 emi1_slot2 = &t2080mdio3;
0048 emi1_slot3 = &t2080mdio4;
0049 };
0050
0051 rio: rapidio@ffe0c0000 {
0052 reg = <0xf 0xfe0c0000 0 0x11000>;
0053
0054 port1 {
0055 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
0056 };
0057 port2 {
0058 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
0059 };
0060 };
0061 };
0062
0063 &soc {
0064 fman@400000 {
0065 ethernet@e0000 {
0066 phy-handle = <&phy_sgmii_s3_1e>;
0067 phy-connection-type = "xgmii";
0068 };
0069
0070 ethernet@e2000 {
0071 phy-handle = <&phy_sgmii_s3_1f>;
0072 phy-connection-type = "xgmii";
0073 };
0074
0075 ethernet@e4000 {
0076 phy-handle = <&rgmii_phy1>;
0077 phy-connection-type = "rgmii";
0078 };
0079
0080 ethernet@e6000 {
0081 phy-handle = <&rgmii_phy2>;
0082 phy-connection-type = "rgmii";
0083 };
0084
0085 ethernet@e8000 {
0086 phy-handle = <&phy_sgmii_s2_1e>;
0087 phy-connection-type = "sgmii";
0088 };
0089
0090 ethernet@ea000 {
0091 phy-handle = <&phy_sgmii_s2_1d>;
0092 phy-connection-type = "sgmii";
0093 };
0094
0095 ethernet@f0000 {
0096 phy-handle = <&phy_xaui_slot3>;
0097 phy-connection-type = "xgmii";
0098 };
0099
0100 ethernet@f2000 {
0101 phy-handle = <&phy_sgmii_s3_1f>;
0102 phy-connection-type = "xgmii";
0103 };
0104
0105 mdio@fd000 {
0106 phy_xaui_slot3: ethernet-phy@3 {
0107 compatible = "ethernet-phy-ieee802.3-c45";
0108 reg = <0x3>;
0109 };
0110 };
0111 };
0112 };
0113
0114 &boardctrl {
0115 mdio-mux-emi1 {
0116 compatible = "mdio-mux-mmioreg", "mdio-mux";
0117 mdio-parent-bus = <&mdio0>;
0118 #address-cells = <1>;
0119 #size-cells = <0>;
0120 reg = <0x54 1>;
0121 mux-mask = <0xe0>;
0122
0123 t2080mdio0: mdio@0 {
0124 #address-cells = <1>;
0125 #size-cells = <0>;
0126 reg = <0>;
0127
0128 rgmii_phy1: ethernet-phy@1 {
0129 reg = <0x1>;
0130 };
0131 };
0132
0133 t2080mdio1: mdio@20 {
0134 #address-cells = <1>;
0135 #size-cells = <0>;
0136 reg = <0x20>;
0137
0138 rgmii_phy2: ethernet-phy@2 {
0139 reg = <0x2>;
0140 };
0141 };
0142
0143 t2080mdio2: mdio@40 {
0144 #address-cells = <1>;
0145 #size-cells = <0>;
0146 reg = <0x40>;
0147 status = "disabled";
0148
0149 phy_sgmii_s1_1c: ethernet-phy@1c {
0150 reg = <0x1c>;
0151 };
0152
0153 phy_sgmii_s1_1d: ethernet-phy@1d {
0154 reg = <0x1d>;
0155 };
0156
0157 phy_sgmii_s1_1e: ethernet-phy@1e {
0158 reg = <0x1e>;
0159 };
0160
0161 phy_sgmii_s1_1f: ethernet-phy@1f {
0162 reg = <0x1f>;
0163 };
0164 };
0165
0166 t2080mdio3: mdio@c0 {
0167 #address-cells = <1>;
0168 #size-cells = <0>;
0169 reg = <0xc0>;
0170
0171 phy_sgmii_s2_1c: ethernet-phy@1c {
0172 reg = <0x1c>;
0173 };
0174
0175 phy_sgmii_s2_1d: ethernet-phy@1d {
0176 reg = <0x1d>;
0177 };
0178
0179 phy_sgmii_s2_1e: ethernet-phy@1e {
0180 reg = <0x1e>;
0181 };
0182
0183 phy_sgmii_s2_1f: ethernet-phy@1f {
0184 reg = <0x1f>;
0185 };
0186 };
0187
0188 t2080mdio4: mdio@60 {
0189 #address-cells = <1>;
0190 #size-cells = <0>;
0191 reg = <0x60>;
0192 status = "disabled";
0193
0194 phy_sgmii_s3_1c: ethernet-phy@1c {
0195 reg = <0x1c>;
0196 };
0197
0198 phy_sgmii_s3_1d: ethernet-phy@1d {
0199 reg = <0x1d>;
0200 };
0201
0202 phy_sgmii_s3_1e: ethernet-phy@1e {
0203 reg = <0x1e>;
0204 };
0205
0206 phy_sgmii_s3_1f: ethernet-phy@1f {
0207 reg = <0x1f>;
0208 };
0209 };
0210 };
0211 };
0212
0213 /include/ "t2080si-post.dtsi"
