0001 /*
0002 * T1040D4RDB/T1042D4RDB Device Tree Source
0003 *
0004 * Copyright 2015 Freescale Semiconductor Inc.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions are met:
0008 * * Redistributions of source code must retain the above copyright
0009 * notice, this list of conditions and the following disclaimer.
0010 * * Redistributions in binary form must reproduce the above copyright
0011 * notice, this list of conditions and the following disclaimer in the
0012 * documentation and/or other materials provided with the distribution.
0013 * * Neither the name of Freescale Semiconductor nor the
0014 * names of its contributors may be used to endorse or promote products
0015 * derived from this software without specific prior written permission.
0016 *
0017 *
0018 * ALTERNATIVELY, this software may be distributed under the terms of the
0019 * GNU General Public License ("GPL") as published by the Free Software
0020 * Foundation, either version 2 of that License or (at your option) any
0021 * later version.
0022 *
0023 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
0024 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0025 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0026 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0027 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0028 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0029 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0030 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0031 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0032 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0033 */
0034
0035 / {
0036 reserved-memory {
0037 #address-cells = <2>;
0038 #size-cells = <2>;
0039 ranges;
0040
0041 bman_fbpr: bman-fbpr {
0042 size = <0 0x1000000>;
0043 alignment = <0 0x1000000>;
0044 };
0045 qman_fqd: qman-fqd {
0046 size = <0 0x400000>;
0047 alignment = <0 0x400000>;
0048 };
0049 qman_pfdr: qman-pfdr {
0050 size = <0 0x2000000>;
0051 alignment = <0 0x2000000>;
0052 };
0053 };
0054
0055 ifc: localbus@ffe124000 {
0056 reg = <0xf 0xfe124000 0 0x2000>;
0057 ranges = <0 0 0xf 0xe8000000 0x08000000
0058 2 0 0xf 0xff800000 0x00010000
0059 3 0 0xf 0xffdf0000 0x00008000>;
0060
0061 nor@0,0 {
0062 #address-cells = <1>;
0063 #size-cells = <1>;
0064 compatible = "cfi-flash";
0065 reg = <0x0 0x0 0x8000000>;
0066 bank-width = <2>;
0067 device-width = <1>;
0068 };
0069
0070 nand@2,0 {
0071 #address-cells = <1>;
0072 #size-cells = <1>;
0073 compatible = "fsl,ifc-nand";
0074 reg = <0x2 0x0 0x10000>;
0075 };
0076
0077 cpld@3,0 {
0078 compatible = "fsl,t1040d4rdb-cpld";
0079 reg = <3 0 0x300>;
0080 };
0081 };
0082
0083 memory {
0084 device_type = "memory";
0085 };
0086
0087 dcsr: dcsr@f00000000 {
0088 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
0089 };
0090
0091 bportals: bman-portals@ff4000000 {
0092 ranges = <0x0 0xf 0xf4000000 0x2000000>;
0093 };
0094
0095 qportals: qman-portals@ff6000000 {
0096 ranges = <0x0 0xf 0xf6000000 0x2000000>;
0097 };
0098
0099 soc: soc@ffe000000 {
0100 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
0101 reg = <0xf 0xfe000000 0 0x00001000>;
0102
0103 spi@110000 {
0104 flash@0 {
0105 #address-cells = <1>;
0106 #size-cells = <1>;
0107 compatible = "micron,n25q512ax3", "jedec,spi-nor";
0108 reg = <0>;
0109 /* input clock */
0110 spi-max-frequency = <10000000>;
0111 };
0112 slic@1 {
0113 compatible = "maxim,ds26522";
0114 reg = <1>;
0115 spi-max-frequency = <2000000>; /* input clock */
0116 };
0117 slic@2 {
0118 compatible = "maxim,ds26522";
0119 reg = <2>;
0120 spi-max-frequency = <2000000>; /* input clock */
0121 };
0122 };
0123 i2c@118000 {
0124 hwmon@4c {
0125 compatible = "adi,adt7461";
0126 reg = <0x4c>;
0127 };
0128
0129 rtc@68 {
0130 compatible = "dallas,ds1337";
0131 reg = <0x68>;
0132 interrupts = <0x2 0x1 0 0>;
0133 };
0134 };
0135
0136 i2c@118100 {
0137 mux@77 {
0138 /*
0139 * Child nodes of mux depend on which i2c
0140 * devices are connected via the mini PCI
0141 * connector slot1, the mini PCI connector
0142 * slot2, the HDMI connector, and the PEX
0143 * slot. Systems with such devices attached
0144 * should provide a wrapper .dts file that
0145 * includes this one, and adds those nodes
0146 */
0147 compatible = "nxp,pca9546";
0148 reg = <0x77>;
0149 #address-cells = <1>;
0150 #size-cells = <0>;
0151 };
0152 };
0153
0154 };
0155
0156 pci0: pcie@ffe240000 {
0157 reg = <0xf 0xfe240000 0 0x10000>;
0158 ranges = <0x02000000 0 0xe0000000 0xc 0x0 0x0 0x10000000
0159 0x01000000 0 0x0 0xf 0xf8000000 0x0 0x00010000>;
0160 pcie@0 {
0161 ranges = <0x02000000 0 0xe0000000
0162 0x02000000 0 0xe0000000
0163 0 0x10000000
0164
0165 0x01000000 0 0x00000000
0166 0x01000000 0 0x00000000
0167 0 0x00010000>;
0168 };
0169 };
0170
0171 pci1: pcie@ffe250000 {
0172 reg = <0xf 0xfe250000 0 0x10000>;
0173 ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000
0174 0x01000000 0 0 0xf 0xf8010000 0 0x00010000>;
0175 pcie@0 {
0176 ranges = <0x02000000 0 0xe0000000
0177 0x02000000 0 0xe0000000
0178 0 0x10000000
0179
0180 0x01000000 0 0x00000000
0181 0x01000000 0 0x00000000
0182 0 0x00010000>;
0183 };
0184 };
0185
0186 pci2: pcie@ffe260000 {
0187 reg = <0xf 0xfe260000 0 0x10000>;
0188 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
0189 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
0190 pcie@0 {
0191 ranges = <0x02000000 0 0xe0000000
0192 0x02000000 0 0xe0000000
0193 0 0x10000000
0194
0195 0x01000000 0 0x00000000
0196 0x01000000 0 0x00000000
0197 0 0x00010000>;
0198 };
0199 };
0200
0201 pci3: pcie@ffe270000 {
0202 reg = <0xf 0xfe270000 0 0x10000>;
0203 ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000
0204 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
0205 pcie@0 {
0206 ranges = <0x02000000 0 0xe0000000
0207 0x02000000 0 0xe0000000
0208 0 0x10000000
0209
0210 0x01000000 0 0x00000000
0211 0x01000000 0 0x00000000
0212 0 0x00010000>;
0213 };
0214 };
0215
0216 qe: qe@ffe140000 {
0217 ranges = <0x0 0xf 0xfe140000 0x40000>;
0218 reg = <0xf 0xfe140000 0 0x480>;
0219 brg-frequency = <0>;
0220 bus-frequency = <0>;
0221
0222 si1: si@700 {
0223 compatible = "fsl,t1040-qe-si";
0224 reg = <0x700 0x80>;
0225 };
0226
0227 siram1: siram@1000 {
0228 compatible = "fsl,t1040-qe-siram";
0229 reg = <0x1000 0x800>;
0230 };
0231
0232 ucc_hdlc: ucc@2000 {
0233 compatible = "fsl,ucc-hdlc";
0234 rx-clock-name = "clk8";
0235 tx-clock-name = "clk9";
0236 fsl,rx-sync-clock = "rsync_pin";
0237 fsl,tx-sync-clock = "tsync_pin";
0238 fsl,tx-timeslot-mask = <0xfffffffe>;
0239 fsl,rx-timeslot-mask = <0xfffffffe>;
0240 fsl,tdm-framer-type = "e1";
0241 fsl,tdm-id = <0>;
0242 fsl,siram-entry-id = <0>;
0243 fsl,tdm-interface;
0244 };
0245
0246 ucc_serial: ucc@2200 {
0247 compatible = "fsl,t1040-ucc-uart";
0248 port-number = <0>;
0249 rx-clock-name = "brg2";
0250 tx-clock-name = "brg2";
0251 };
0252 };
0253 };
