0001 /*
0002 * T1024 RDB Device Tree Source
0003 *
0004 * Copyright 2014 Freescale Semiconductor Inc.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions are met:
0008 * * Redistributions of source code must retain the above copyright
0009 * notice, this list of conditions and the following disclaimer.
0010 * * Redistributions in binary form must reproduce the above copyright
0011 * notice, this list of conditions and the following disclaimer in the
0012 * documentation and/or other materials provided with the distribution.
0013 * * Neither the name of Freescale Semiconductor nor the
0014 * names of its contributors may be used to endorse or promote products
0015 * derived from this software without specific prior written permission.
0016 *
0017 *
0018 * ALTERNATIVELY, this software may be distributed under the terms of the
0019 * GNU General Public License ("GPL") as published by the Free Software
0020 * Foundation, either version 2 of that License or (at your option) any
0021 * later version.
0022 *
0023 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
0024 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0025 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0026 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0027 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0028 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0029 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0030 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0031 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0032 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0033 */
0034
0035 /include/ "t102xsi-pre.dtsi"
0036
0037 / {
0038 model = "fsl,T1024RDB";
0039 compatible = "fsl,T1024RDB";
0040 #address-cells = <2>;
0041 #size-cells = <2>;
0042 interrupt-parent = <&mpic>;
0043
0044 aliases {
0045 sg_2500_aqr105_phy4 = &sg_2500_aqr105_phy4;
0046 };
0047
0048 reserved-memory {
0049 #address-cells = <2>;
0050 #size-cells = <2>;
0051 ranges;
0052
0053 bman_fbpr: bman-fbpr {
0054 size = <0 0x1000000>;
0055 alignment = <0 0x1000000>;
0056 };
0057
0058 qman_fqd: qman-fqd {
0059 size = <0 0x400000>;
0060 alignment = <0 0x400000>;
0061 };
0062
0063 qman_pfdr: qman-pfdr {
0064 size = <0 0x2000000>;
0065 alignment = <0 0x2000000>;
0066 };
0067 };
0068
0069 ifc: localbus@ffe124000 {
0070 reg = <0xf 0xfe124000 0 0x2000>;
0071 ranges = <0 0 0xf 0xe8000000 0x08000000
0072 2 0 0xf 0xff800000 0x00010000
0073 3 0 0xf 0xffdf0000 0x00008000>;
0074
0075 nor@0,0 {
0076 #address-cells = <1>;
0077 #size-cells = <1>;
0078 compatible = "cfi-flash";
0079 reg = <0x0 0x0 0x8000000>;
0080 bank-width = <2>;
0081 device-width = <1>;
0082 };
0083
0084 nand@1,0 {
0085 #address-cells = <1>;
0086 #size-cells = <1>;
0087 compatible = "fsl,ifc-nand";
0088 reg = <0x2 0x0 0x10000>;
0089 };
0090
0091 board-control@2,0 {
0092 #address-cells = <1>;
0093 #size-cells = <1>;
0094 compatible = "fsl,t1024-cpld";
0095 reg = <3 0 0x300>;
0096 ranges = <0 3 0 0x300>;
0097 bank-width = <1>;
0098 device-width = <1>;
0099 };
0100 };
0101
0102 memory {
0103 device_type = "memory";
0104 };
0105
0106 dcsr: dcsr@f00000000 {
0107 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
0108 };
0109
0110 bportals: bman-portals@ff4000000 {
0111 ranges = <0x0 0xf 0xf4000000 0x2000000>;
0112 };
0113
0114 qportals: qman-portals@ff6000000 {
0115 ranges = <0x0 0xf 0xf6000000 0x2000000>;
0116 };
0117
0118 soc: soc@ffe000000 {
0119 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
0120 reg = <0xf 0xfe000000 0 0x00001000>;
0121 spi@110000 {
0122 flash@0 {
0123 #address-cells = <1>;
0124 #size-cells = <1>;
0125 compatible = "micron,n25q512ax3", "jedec,spi-nor";
0126 reg = <0>;
0127 spi-max-frequency = <10000000>; /* input clk */
0128 };
0129
0130 slic@1 {
0131 compatible = "maxim,ds26522";
0132 reg = <1>;
0133 spi-max-frequency = <2000000>;
0134 };
0135
0136 slic@2 {
0137 compatible = "maxim,ds26522";
0138 reg = <2>;
0139 spi-max-frequency = <2000000>;
0140 };
0141 };
0142
0143 i2c@118000 {
0144 adt7461@4c {
0145 /* Thermal Monitor */
0146 compatible = "adi,adt7461";
0147 reg = <0x4c>;
0148 };
0149
0150 current-sensor@40 {
0151 compatible = "ti,ina220";
0152 reg = <0x40>;
0153 shunt-resistor = <1000>;
0154 };
0155
0156 eeprom@50 {
0157 compatible = "atmel,24c256";
0158 reg = <0x50>;
0159 };
0160
0161 rtc@68 {
0162 compatible = "dallas,ds1339";
0163 reg = <0x68>;
0164 };
0165 };
0166
0167 i2c@118100 {
0168 pca9546@77 {
0169 compatible = "nxp,pca9546";
0170 reg = <0x77>;
0171 #address-cells = <1>;
0172 #size-cells = <0>;
0173 };
0174 };
0175
0176 fman@400000 {
0177 fm1mac1: ethernet@e0000 {
0178 phy-handle = <&xg_aqr105_phy3>;
0179 phy-connection-type = "xgmii";
0180 sleep = <&rcpm 0x80000000>;
0181 };
0182
0183 fm1mac2: ethernet@e2000 {
0184 sleep = <&rcpm 0x40000000>;
0185 };
0186
0187 fm1mac3: ethernet@e4000 {
0188 phy-handle = <&rgmii_phy2>;
0189 phy-connection-type = "rgmii";
0190 sleep = <&rcpm 0x20000000>;
0191 };
0192
0193 fm1mac4: ethernet@e6000 {
0194 phy-handle = <&rgmii_phy1>;
0195 phy-connection-type = "rgmii";
0196 sleep = <&rcpm 0x10000000>;
0197 };
0198
0199
0200 mdio0: mdio@fc000 {
0201 rgmii_phy1: ethernet-phy@2 {
0202 reg = <0x2>;
0203 };
0204 rgmii_phy2: ethernet-phy@6 {
0205 reg = <0x6>;
0206 };
0207 };
0208
0209 xmdio0: mdio@fd000 {
0210 xg_aqr105_phy3: ethernet-phy@1 {
0211 compatible = "ethernet-phy-ieee802.3-c45";
0212 reg = <0x1>;
0213 };
0214 sg_2500_aqr105_phy4: ethernet-phy@2 {
0215 compatible = "ethernet-phy-ieee802.3-c45";
0216 reg = <0x2>;
0217 };
0218 };
0219 };
0220 };
0221
0222 pci0: pcie@ffe240000 {
0223 reg = <0xf 0xfe240000 0 0x10000>;
0224 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0 0x10000000
0225 0x01000000 0 0x00000000 0xf 0xf8000000 0 0x00010000>;
0226 pcie@0 {
0227 ranges = <0x02000000 0 0xe0000000
0228 0x02000000 0 0xe0000000
0229 0 0x10000000
0230
0231 0x01000000 0 0x00000000
0232 0x01000000 0 0x00000000
0233 0 0x00010000>;
0234 };
0235 };
0236
0237 pci1: pcie@ffe250000 {
0238 reg = <0xf 0xfe250000 0 0x10000>;
0239 ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000
0240 0x01000000 0 0x00000000 0xf 0xf8010000 0 0x00010000>;
0241 pcie@0 {
0242 ranges = <0x02000000 0 0xe0000000
0243 0x02000000 0 0xe0000000
0244 0 0x10000000
0245
0246 0x01000000 0 0x00000000
0247 0x01000000 0 0x00000000
0248 0 0x00010000>;
0249 };
0250 };
0251
0252 pci2: pcie@ffe260000 {
0253 reg = <0xf 0xfe260000 0 0x10000>;
0254 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
0255 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
0256 pcie@0 {
0257 ranges = <0x02000000 0 0xe0000000
0258 0x02000000 0 0xe0000000
0259 0 0x10000000
0260
0261 0x01000000 0 0x00000000
0262 0x01000000 0 0x00000000
0263 0 0x00010000>;
0264 };
0265 };
0266 };
0267
0268 #include "t1024si-post.dtsi"
