0001 /*
0002 * T1024 QDS Device Tree Source
0003 *
0004 * Copyright 2014 Freescale Semiconductor Inc.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions are met:
0008 * * Redistributions of source code must retain the above copyright
0009 * notice, this list of conditions and the following disclaimer.
0010 * * Redistributions in binary form must reproduce the above copyright
0011 * notice, this list of conditions and the following disclaimer in the
0012 * documentation and/or other materials provided with the distribution.
0013 * * Neither the name of Freescale Semiconductor nor the
0014 * names of its contributors may be used to endorse or promote products
0015 * derived from this software without specific prior written permission.
0016 *
0017 *
0018 * ALTERNATIVELY, this software may be distributed under the terms of the
0019 * GNU General Public License ("GPL") as published by the Free Software
0020 * Foundation, either version 2 of that License or (at your option) any
0021 * later version.
0022 *
0023 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
0024 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0025 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0026 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0027 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0028 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0029 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0030 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0031 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0032 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0033 */
0034
0035 /include/ "t102xsi-pre.dtsi"
0036
0037 / {
0038 model = "fsl,T1024QDS";
0039 compatible = "fsl,T1024QDS";
0040 #address-cells = <2>;
0041 #size-cells = <2>;
0042 interrupt-parent = <&mpic>;
0043
0044 reserved-memory {
0045 #address-cells = <2>;
0046 #size-cells = <2>;
0047 ranges;
0048
0049 bman_fbpr: bman-fbpr {
0050 size = <0 0x1000000>;
0051 alignment = <0 0x1000000>;
0052 };
0053
0054 qman_fqd: qman-fqd {
0055 size = <0 0x400000>;
0056 alignment = <0 0x400000>;
0057 };
0058
0059 qman_pfdr: qman-pfdr {
0060 size = <0 0x2000000>;
0061 alignment = <0 0x2000000>;
0062 };
0063 };
0064
0065 ifc: localbus@ffe124000 {
0066 reg = <0xf 0xfe124000 0 0x2000>;
0067 ranges = <0 0 0xf 0xe8000000 0x08000000
0068 2 0 0xf 0xff800000 0x00010000
0069 3 0 0xf 0xffdf0000 0x00008000>;
0070
0071 nor@0,0 {
0072 #address-cells = <1>;
0073 #size-cells = <1>;
0074 compatible = "cfi-flash";
0075 reg = <0x0 0x0 0x8000000>;
0076 bank-width = <2>;
0077 device-width = <1>;
0078 };
0079
0080 nand@2,0 {
0081 #address-cells = <1>;
0082 #size-cells = <1>;
0083 compatible = "fsl,ifc-nand";
0084 reg = <0x2 0x0 0x10000>;
0085 };
0086
0087 board-control@3,0 {
0088 #address-cells = <1>;
0089 #size-cells = <1>;
0090 compatible = "fsl,tetra-fpga", "fsl,fpga-qixis";
0091 reg = <3 0 0x300>;
0092 ranges = <0 3 0 0x300>;
0093 };
0094 };
0095
0096 memory {
0097 device_type = "memory";
0098 };
0099
0100 dcsr: dcsr@f00000000 {
0101 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
0102 };
0103
0104 bportals: bman-portals@ff4000000 {
0105 ranges = <0x0 0xf 0xf4000000 0x2000000>;
0106 };
0107
0108 qportals: qman-portals@ff6000000 {
0109 ranges = <0x0 0xf 0xf6000000 0x2000000>;
0110 };
0111
0112 soc: soc@ffe000000 {
0113 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
0114 reg = <0xf 0xfe000000 0 0x00001000>;
0115 spi@110000 {
0116 flash@0 {
0117 #address-cells = <1>;
0118 #size-cells = <1>;
0119 compatible = "micron,n25q128a11", "jedec,spi-nor"; /* 16MB */
0120 reg = <0>;
0121 spi-max-frequency = <10000000>;
0122 };
0123
0124 flash@1 {
0125 #address-cells = <1>;
0126 #size-cells = <1>;
0127 compatible = "sst,sst25wf040", "jedec,spi-nor"; /* 512KB */
0128 reg = <1>;
0129 spi-max-frequency = <10000000>;
0130 };
0131
0132 flash@2 {
0133 #address-cells = <1>;
0134 #size-cells = <1>;
0135 compatible = "eon,en25s64", "jedec,spi-nor"; /* 8MB */
0136 reg = <2>;
0137 spi-max-frequency = <10000000>;
0138 };
0139
0140 slic@2 {
0141 compatible = "maxim,ds26522";
0142 reg = <2>;
0143 spi-max-frequency = <2000000>;
0144 };
0145
0146 slic@3 {
0147 compatible = "maxim,ds26522";
0148 reg = <3>;
0149 spi-max-frequency = <2000000>;
0150 };
0151 };
0152
0153 i2c@118000 {
0154 pca9547@77 {
0155 compatible = "nxp,pca9547";
0156 reg = <0x77>;
0157 #address-cells = <1>;
0158 #size-cells = <0>;
0159
0160 i2c@0 {
0161 #address-cells = <1>;
0162 #size-cells = <0>;
0163 reg = <0x0>;
0164
0165 eeprom@50 {
0166 compatible = "atmel,24c512";
0167 reg = <0x50>;
0168 };
0169
0170 eeprom@51 {
0171 compatible = "atmel,24c02";
0172 reg = <0x51>;
0173 };
0174
0175 eeprom@57 {
0176 compatible = "atmel,24c02";
0177 reg = <0x57>;
0178 };
0179 };
0180
0181 i2c@2 {
0182 #address-cells = <1>;
0183 #size-cells = <0>;
0184 reg = <0x2>;
0185
0186 ina220@40 {
0187 compatible = "ti,ina220";
0188 reg = <0x40>;
0189 shunt-resistor = <1000>;
0190 };
0191
0192 ina220@41 {
0193 compatible = "ti,ina220";
0194 reg = <0x41>;
0195 shunt-resistor = <1000>;
0196 };
0197 };
0198
0199 i2c@3 {
0200 #address-cells = <1>;
0201 #size-cells = <0>;
0202 reg = <0x3>;
0203
0204 adt7461@4c {
0205 /* Thermal Monitor */
0206 compatible = "adi,adt7461";
0207 reg = <0x4c>;
0208 };
0209
0210 eeprom@55 {
0211 compatible = "atmel,24c02";
0212 reg = <0x55>;
0213 };
0214
0215 eeprom@56 {
0216 compatible = "atmel,24c512";
0217 reg = <0x56>;
0218 };
0219
0220 eeprom@57 {
0221 compatible = "atmel,24c512";
0222 reg = <0x57>;
0223 };
0224 };
0225 };
0226 rtc@68 {
0227 compatible = "dallas,ds3232";
0228 reg = <0x68>;
0229 interrupts = <0x5 0x1 0 0>;
0230 };
0231 };
0232 };
0233
0234 pci0: pcie@ffe240000 {
0235 reg = <0xf 0xfe240000 0 0x10000>;
0236 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0 0x10000000
0237 0x01000000 0 0x00000000 0xf 0xf8000000 0 0x00010000>;
0238 pcie@0 {
0239 ranges = <0x02000000 0 0xe0000000
0240 0x02000000 0 0xe0000000
0241 0 0x10000000
0242
0243 0x01000000 0 0x00000000
0244 0x01000000 0 0x00000000
0245 0 0x00010000>;
0246 };
0247 };
0248
0249 pci1: pcie@ffe250000 {
0250 reg = <0xf 0xfe250000 0 0x10000>;
0251 ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000
0252 0x01000000 0 0x00000000 0xf 0xf8010000 0 0x00010000>;
0253 pcie@0 {
0254 ranges = <0x02000000 0 0xe0000000
0255 0x02000000 0 0xe0000000
0256 0 0x10000000
0257
0258 0x01000000 0 0x00000000
0259 0x01000000 0 0x00000000
0260 0 0x00010000>;
0261 };
0262 };
0263
0264 pci2: pcie@ffe260000 {
0265 reg = <0xf 0xfe260000 0 0x10000>;
0266 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
0267 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
0268 pcie@0 {
0269 ranges = <0x02000000 0 0xe0000000
0270 0x02000000 0 0xe0000000
0271 0 0x10000000
0272
0273 0x01000000 0 0x00000000
0274 0x01000000 0 0x00000000
0275 0 0x00010000>;
0276 };
0277 };
0278 };
0279
0280 #include "t1024si-post.dtsi"
