0001 /*
0002 * QorIQ Sec/Crypto 5.2 device tree stub [ controller @ offset 0x300000 ]
0003 *
0004 * Copyright 2011-2012 Freescale Semiconductor Inc.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions are met:
0008 * * Redistributions of source code must retain the above copyright
0009 * notice, this list of conditions and the following disclaimer.
0010 * * Redistributions in binary form must reproduce the above copyright
0011 * notice, this list of conditions and the following disclaimer in the
0012 * documentation and/or other materials provided with the distribution.
0013 * * Neither the name of Freescale Semiconductor nor the
0014 * names of its contributors may be used to endorse or promote products
0015 * derived from this software without specific prior written permission.
0016 *
0017 *
0018 * ALTERNATIVELY, this software may be distributed under the terms of the
0019 * GNU General Public License ("GPL") as published by the Free Software
0020 * Foundation, either version 2 of that License or (at your option) any
0021 * later version.
0022 *
0023 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
0024 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0025 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0026 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0027 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0028 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0029 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0030 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0031 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0032 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0033 */
0034
0035 crypto: crypto@300000 {
0036 compatible = "fsl,sec-v5.2", "fsl,sec-v5.0", "fsl,sec-v4.0";
0037 fsl,sec-era = <5>;
0038 #address-cells = <1>;
0039 #size-cells = <1>;
0040 reg = <0x300000 0x10000>;
0041 ranges = <0 0x300000 0x10000>;
0042 interrupts = <92 2 0 0>;
0043
0044 sec_jr0: jr@1000 {
0045 compatible = "fsl,sec-v5.2-job-ring",
0046 "fsl,sec-v5.0-job-ring",
0047 "fsl,sec-v4.0-job-ring";
0048 reg = <0x1000 0x1000>;
0049 interrupts = <88 2 0 0>;
0050 };
0051
0052 sec_jr1: jr@2000 {
0053 compatible = "fsl,sec-v5.2-job-ring",
0054 "fsl,sec-v5.0-job-ring",
0055 "fsl,sec-v4.0-job-ring";
0056 reg = <0x2000 0x1000>;
0057 interrupts = <89 2 0 0>;
0058 };
0059
0060 sec_jr2: jr@3000 {
0061 compatible = "fsl,sec-v5.2-job-ring",
0062 "fsl,sec-v5.0-job-ring",
0063 "fsl,sec-v4.0-job-ring";
0064 reg = <0x3000 0x1000>;
0065 interrupts = <90 2 0 0>;
0066 };
0067
0068 sec_jr3: jr@4000 {
0069 compatible = "fsl,sec-v5.2-job-ring",
0070 "fsl,sec-v5.0-job-ring",
0071 "fsl,sec-v4.0-job-ring";
0072 reg = <0x4000 0x1000>;
0073 interrupts = <91 2 0 0>;
0074 };
0075
0076 rtic@6000 {
0077 compatible = "fsl,sec-v5.2-rtic",
0078 "fsl,sec-v5.0-rtic",
0079 "fsl,sec-v4.0-rtic";
0080 #address-cells = <1>;
0081 #size-cells = <1>;
0082 reg = <0x6000 0x100>;
0083 ranges = <0x0 0x6100 0xe00>;
0084
0085 rtic_a: rtic-a@0 {
0086 compatible = "fsl,sec-v5.2-rtic-memory",
0087 "fsl,sec-v5.0-rtic-memory",
0088 "fsl,sec-v4.0-rtic-memory";
0089 reg = <0x00 0x20 0x100 0x80>;
0090 };
0091
0092 rtic_b: rtic-b@20 {
0093 compatible = "fsl,sec-v5.2-rtic-memory",
0094 "fsl,sec-v5.0-rtic-memory",
0095 "fsl,sec-v4.0-rtic-memory";
0096 reg = <0x20 0x20 0x200 0x80>;
0097 };
0098
0099 rtic_c: rtic-c@40 {
0100 compatible = "fsl,sec-v5.2-rtic-memory",
0101 "fsl,sec-v5.0-rtic-memory",
0102 "fsl,sec-v4.0-rtic-memory";
0103 reg = <0x40 0x20 0x300 0x80>;
0104 };
0105
0106 rtic_d: rtic-d@60 {
0107 compatible = "fsl,sec-v5.2-rtic-memory",
0108 "fsl,sec-v5.0-rtic-memory",
0109 "fsl,sec-v4.0-rtic-memory";
0110 reg = <0x60 0x20 0x500 0x80>;
0111 };
0112 };
0113 };
0114
0115 sec_mon: sec_mon@314000 {
0116 compatible = "fsl,sec-v5.2-mon", "fsl,sec-v5.0-mon", "fsl,sec-v4.0-mon";
0117 reg = <0x314000 0x1000>;
0118 interrupts = <93 2 0 0>;
0119 };
