0001 /*
0002 * QorIQ MPIC device tree stub [ controller @ offset 0x40000 ]
0003 *
0004 * Copyright 2011 Freescale Semiconductor Inc.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions are met:
0008 * * Redistributions of source code must retain the above copyright
0009 * notice, this list of conditions and the following disclaimer.
0010 * * Redistributions in binary form must reproduce the above copyright
0011 * notice, this list of conditions and the following disclaimer in the
0012 * documentation and/or other materials provided with the distribution.
0013 * * Neither the name of Freescale Semiconductor nor the
0014 * names of its contributors may be used to endorse or promote products
0015 * derived from this software without specific prior written permission.
0016 *
0017 *
0018 * ALTERNATIVELY, this software may be distributed under the terms of the
0019 * GNU General Public License ("GPL") as published by the Free Software
0020 * Foundation, either version 2 of that License or (at your option) any
0021 * later version.
0022 *
0023 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
0024 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0025 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0026 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0027 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0028 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0029 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0030 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0031 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0032 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0033 */
0034
0035 mpic: pic@40000 {
0036 interrupt-controller;
0037 #address-cells = <0>;
0038 #interrupt-cells = <4>;
0039 reg = <0x40000 0x40000>;
0040 compatible = "fsl,mpic", "chrp,open-pic";
0041 device_type = "open-pic";
0042 clock-frequency = <0x0>;
0043 };
0044
0045 timer@41100 {
0046 compatible = "fsl,mpic-global-timer";
0047 reg = <0x41100 0x100 0x41300 4>;
0048 interrupts = <0 0 3 0
0049 1 0 3 0
0050 2 0 3 0
0051 3 0 3 0>;
0052 };
0053
0054 msi0: msi@41600 {
0055 compatible = "fsl,mpic-msi";
0056 reg = <0x41600 0x200 0x44140 4>;
0057 msi-available-ranges = <0 0x100>;
0058 interrupts = <
0059 0xe0 0 0 0
0060 0xe1 0 0 0
0061 0xe2 0 0 0
0062 0xe3 0 0 0
0063 0xe4 0 0 0
0064 0xe5 0 0 0
0065 0xe6 0 0 0
0066 0xe7 0 0 0>;
0067 };
0068
0069 msi1: msi@41800 {
0070 compatible = "fsl,mpic-msi";
0071 reg = <0x41800 0x200 0x45140 4>;
0072 msi-available-ranges = <0 0x100>;
0073 interrupts = <
0074 0xe8 0 0 0
0075 0xe9 0 0 0
0076 0xea 0 0 0
0077 0xeb 0 0 0
0078 0xec 0 0 0
0079 0xed 0 0 0
0080 0xee 0 0 0
0081 0xef 0 0 0>;
0082 };
0083
0084 msi2: msi@41a00 {
0085 compatible = "fsl,mpic-msi";
0086 reg = <0x41a00 0x200 0x46140 4>;
0087 msi-available-ranges = <0 0x100>;
0088 interrupts = <
0089 0xf0 0 0 0
0090 0xf1 0 0 0
0091 0xf2 0 0 0
0092 0xf3 0 0 0
0093 0xf4 0 0 0
0094 0xf5 0 0 0
0095 0xf6 0 0 0
0096 0xf7 0 0 0>;
0097 };
0098
0099 timer@42100 {
0100 compatible = "fsl,mpic-global-timer";
0101 reg = <0x42100 0x100 0x42300 4>;
0102 interrupts = <4 0 3 0
0103 5 0 3 0
0104 6 0 3 0
0105 7 0 3 0>;
0106 };
