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OSCL-LXR

 
 

    


0001 /*
0002  * PQ3 MPIC device tree stub [ controller @ offset 0x40000 ]
0003  *
0004  * Copyright 2011 Freescale Semiconductor Inc.
0005  *
0006  * Redistribution and use in source and binary forms, with or without
0007  * modification, are permitted provided that the following conditions are met:
0008  *     * Redistributions of source code must retain the above copyright
0009  *       notice, this list of conditions and the following disclaimer.
0010  *     * Redistributions in binary form must reproduce the above copyright
0011  *       notice, this list of conditions and the following disclaimer in the
0012  *       documentation and/or other materials provided with the distribution.
0013  *     * Neither the name of Freescale Semiconductor nor the
0014  *       names of its contributors may be used to endorse or promote products
0015  *       derived from this software without specific prior written permission.
0016  *
0017  *
0018  * ALTERNATIVELY, this software may be distributed under the terms of the
0019  * GNU General Public License ("GPL") as published by the Free Software
0020  * Foundation, either version 2 of that License or (at your option) any
0021  * later version.
0022  *
0023  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
0024  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0025  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0026  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0027  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0028  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0029  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0030  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0031  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0032  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0033  */
0034 
0035 mpic: pic@40000 {
0036         interrupt-controller;
0037         #address-cells = <0>;
0038         #interrupt-cells = <4>;
0039         reg = <0x40000 0x40000>;
0040         compatible = "fsl,mpic";
0041         device_type = "open-pic";
0042         big-endian;
0043         single-cpu-affinity;
0044         last-interrupt-source = <255>;
0045 };
0046 
0047 timer@41100 {
0048         compatible = "fsl,mpic-global-timer";
0049         reg = <0x41100 0x100 0x41300 4>;
0050         interrupts = <0 0 3 0
0051                       1 0 3 0
0052                       2 0 3 0
0053                       3 0 3 0>;
0054 };
0055 
0056 message@41400 {
0057         compatible = "fsl,mpic-v3.1-msgr";
0058         reg = <0x41400 0x200>;
0059         interrupts = <
0060                 0xb0 2 0 0
0061                 0xb1 2 0 0
0062                 0xb2 2 0 0
0063                 0xb3 2 0 0>;
0064 };
0065 
0066 msi@41600 {
0067         compatible = "fsl,mpic-msi";
0068         reg = <0x41600 0x80>;
0069         msi-available-ranges = <0 0x100>;
0070         interrupts = <
0071                 0xe0 0 0 0
0072                 0xe1 0 0 0
0073                 0xe2 0 0 0
0074                 0xe3 0 0 0
0075                 0xe4 0 0 0
0076                 0xe5 0 0 0
0077                 0xe6 0 0 0
0078                 0xe7 0 0 0>;
0079 };