0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * PPA8548 Device Tree Source (36-bit address map)
0004 * Copyright 2013 Prodrive B.V.
0005 *
0006 * Based on:
0007 * MPC8548 CDS Device Tree Source (36-bit address map)
0008 * Copyright 2012 Freescale Semiconductor Inc.
0009 */
0010
0011 /include/ "mpc8548si-pre.dtsi"
0012
0013 / {
0014 model = "ppa8548";
0015 compatible = "ppa8548";
0016 #address-cells = <2>;
0017 #size-cells = <2>;
0018 interrupt-parent = <&mpic>;
0019
0020 memory {
0021 device_type = "memory";
0022 reg = <0 0 0x0 0x40000000>;
0023 };
0024
0025 lbc: localbus@fe0005000 {
0026 reg = <0xf 0xe0005000 0 0x1000>;
0027 ranges = <0x0 0x0 0xf 0xff800000 0x00800000>;
0028 };
0029
0030 soc: soc8548@fe0000000 {
0031 ranges = <0 0xf 0xe0000000 0x100000>;
0032 };
0033
0034 pci0: pci@fe0008000 {
0035 /* ppa8548 board doesn't support PCI */
0036 status = "disabled";
0037 };
0038
0039 pci1: pci@fe0009000 {
0040 /* ppa8548 board doesn't support PCI */
0041 status = "disabled";
0042 };
0043
0044 pci2: pcie@fe000a000 {
0045 /* ppa8548 board doesn't support PCI */
0046 status = "disabled";
0047 };
0048
0049 rio: rapidio@fe00c0000 {
0050 reg = <0xf 0xe00c0000 0x0 0x11000>;
0051 port1 {
0052 ranges = <0x0 0x0 0x0 0x80000000 0x0 0x40000000>;
0053 };
0054 };
0055 };
0056
0057 &lbc {
0058 nor@0 {
0059 #address-cells = <1>;
0060 #size-cells = <1>;
0061 compatible = "cfi-flash";
0062 reg = <0x0 0x0 0x00800000>;
0063 bank-width = <2>;
0064 device-width = <2>;
0065
0066 partition@0 {
0067 reg = <0x0 0x7A0000>;
0068 label = "user";
0069 };
0070
0071 partition@7A0000 {
0072 reg = <0x7A0000 0x20000>;
0073 label = "env";
0074 read-only;
0075 };
0076
0077 partition@7C0000 {
0078 reg = <0x7C0000 0x40000>;
0079 label = "u-boot";
0080 read-only;
0081 };
0082 };
0083 };
0084
0085 &soc {
0086 i2c@3000 {
0087 rtc@6f {
0088 compatible = "intersil,isl1208";
0089 reg = <0x6f>;
0090 };
0091 };
0092
0093 i2c@3100 {
0094 };
0095
0096 /*
0097 * Only ethernet controller @25000 and @26000 are used.
0098 * Use alias enet2 and enet3 for the remainig controllers,
0099 * to stay compatible with mpc8548si-pre.dtsi.
0100 */
0101 enet2: ethernet@24000 {
0102 status = "disabled";
0103 };
0104
0105 mdio@24520 {
0106 phy0: ethernet-phy@0 {
0107 interrupts = <7 1 0 0>;
0108 reg = <0x0>;
0109 };
0110 phy1: ethernet-phy@1 {
0111 interrupts = <8 1 0 0>;
0112 reg = <0x1>;
0113 };
0114 tbi0: tbi-phy@11 {
0115 reg = <0x11>;
0116 device_type = "tbi-phy";
0117 };
0118 };
0119
0120 enet0: ethernet@25000 {
0121 tbi-handle = <&tbi1>;
0122 phy-handle = <&phy0>;
0123 };
0124
0125 mdio@25520 {
0126 tbi1: tbi-phy@11 {
0127 reg = <0x11>;
0128 device_type = "tbi-phy";
0129 };
0130 };
0131
0132 enet1: ethernet@26000 {
0133 tbi-handle = <&tbi2>;
0134 phy-handle = <&phy1>;
0135 };
0136
0137 mdio@26520 {
0138 tbi2: tbi-phy@11 {
0139 reg = <0x11>;
0140 device_type = "tbi-phy";
0141 };
0142 };
0143
0144 enet3: ethernet@27000 {
0145 status = "disabled";
0146 };
0147
0148 mdio@27520 {
0149 tbi3: tbi-phy@11 {
0150 reg = <0x11>;
0151 device_type = "tbi-phy";
0152 };
0153 };
0154
0155 crypto@30000 {
0156 status = "disabled";
0157 };
0158 };
0159
0160 /include/ "mpc8548si-post.dtsi"
