0001 /*
0002 * P4080DS Device Tree Source
0003 *
0004 * Copyright 2009 - 2015 Freescale Semiconductor Inc.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions are met:
0008 * * Redistributions of source code must retain the above copyright
0009 * notice, this list of conditions and the following disclaimer.
0010 * * Redistributions in binary form must reproduce the above copyright
0011 * notice, this list of conditions and the following disclaimer in the
0012 * documentation and/or other materials provided with the distribution.
0013 * * Neither the name of Freescale Semiconductor nor the
0014 * names of its contributors may be used to endorse or promote products
0015 * derived from this software without specific prior written permission.
0016 *
0017 *
0018 * ALTERNATIVELY, this software may be distributed under the terms of the
0019 * GNU General Public License ("GPL") as published by the Free Software
0020 * Foundation, either version 2 of that License or (at your option) any
0021 * later version.
0022 *
0023 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
0024 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0025 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0026 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0027 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0028 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0029 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0030 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0031 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0032 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0033 */
0034
0035 /include/ "p4080si-pre.dtsi"
0036
0037 / {
0038 model = "fsl,P4080DS";
0039 compatible = "fsl,P4080DS";
0040 #address-cells = <2>;
0041 #size-cells = <2>;
0042 interrupt-parent = <&mpic>;
0043
0044 aliases {
0045 phy_rgmii = &phyrgmii;
0046 phy5_slot3 = &phy5slot3;
0047 phy6_slot3 = &phy6slot3;
0048 phy7_slot3 = &phy7slot3;
0049 phy8_slot3 = &phy8slot3;
0050 emi1_slot3 = &p4080mdio2;
0051 emi1_slot4 = &p4080mdio1;
0052 emi1_slot5 = &p4080mdio3;
0053 emi1_rgmii = &p4080mdio0;
0054 emi2_slot4 = &p4080xmdio1;
0055 emi2_slot5 = &p4080xmdio3;
0056 };
0057
0058 memory {
0059 device_type = "memory";
0060 };
0061
0062 reserved-memory {
0063 #address-cells = <2>;
0064 #size-cells = <2>;
0065 ranges;
0066
0067 bman_fbpr: bman-fbpr {
0068 size = <0 0x1000000>;
0069 alignment = <0 0x1000000>;
0070 };
0071 qman_fqd: qman-fqd {
0072 size = <0 0x400000>;
0073 alignment = <0 0x400000>;
0074 };
0075 qman_pfdr: qman-pfdr {
0076 size = <0 0x2000000>;
0077 alignment = <0 0x2000000>;
0078 };
0079 };
0080
0081 dcsr: dcsr@f00000000 {
0082 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
0083 };
0084
0085 bportals: bman-portals@ff4000000 {
0086 ranges = <0x0 0xf 0xf4000000 0x200000>;
0087 };
0088
0089 qportals: qman-portals@ff4200000 {
0090 ranges = <0x0 0xf 0xf4200000 0x200000>;
0091 };
0092
0093 soc: soc@ffe000000 {
0094 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
0095 reg = <0xf 0xfe000000 0 0x00001000>;
0096
0097 spi@110000 {
0098 flash@0 {
0099 #address-cells = <1>;
0100 #size-cells = <1>;
0101 compatible = "spansion,s25sl12801", "jedec,spi-nor";
0102 reg = <0>;
0103 spi-max-frequency = <40000000>; /* input clock */
0104 partition@u-boot {
0105 label = "u-boot";
0106 reg = <0x00000000 0x00100000>;
0107 read-only;
0108 };
0109 partition@kernel {
0110 label = "kernel";
0111 reg = <0x00100000 0x00500000>;
0112 read-only;
0113 };
0114 partition@dtb {
0115 label = "dtb";
0116 reg = <0x00600000 0x00100000>;
0117 read-only;
0118 };
0119 partition@fs {
0120 label = "file system";
0121 reg = <0x00700000 0x00900000>;
0122 };
0123 };
0124 };
0125
0126 i2c@118100 {
0127 eeprom@51 {
0128 compatible = "atmel,spd";
0129 reg = <0x51>;
0130 };
0131 eeprom@52 {
0132 compatible = "atmel,spd";
0133 reg = <0x52>;
0134 };
0135 rtc@68 {
0136 compatible = "dallas,ds3232";
0137 reg = <0x68>;
0138 interrupts = <0x1 0x1 0 0>;
0139 };
0140 adt7461@4c {
0141 compatible = "adi,adt7461";
0142 reg = <0x4c>;
0143 };
0144 };
0145
0146 i2c@118000 {
0147 zl2006@21 {
0148 compatible = "zl2006";
0149 reg = <0x21>;
0150 };
0151 zl2006@22 {
0152 compatible = "zl2006";
0153 reg = <0x22>;
0154 };
0155 zl2006@23 {
0156 compatible = "zl2006";
0157 reg = <0x23>;
0158 };
0159 zl2006@24 {
0160 compatible = "zl2006";
0161 reg = <0x24>;
0162 };
0163 eeprom@50 {
0164 compatible = "atmel,24c64";
0165 reg = <0x50>;
0166 };
0167 eeprom@55 {
0168 compatible = "atmel,24c64";
0169 reg = <0x55>;
0170 };
0171 eeprom@56 {
0172 compatible = "atmel,24c64";
0173 reg = <0x56>;
0174 };
0175 eeprom@57 {
0176 compatible = "atmel,24c02";
0177 reg = <0x57>;
0178 };
0179 };
0180
0181 i2c@119100 {
0182 /* 0x6E: ICS9FG108 */
0183 };
0184
0185 usb0: usb@210000 {
0186 phy_type = "ulpi";
0187 };
0188
0189 usb1: usb@211000 {
0190 dr_mode = "host";
0191 phy_type = "ulpi";
0192 };
0193
0194 fman@400000 {
0195 ethernet@e0000 {
0196 phy-handle = <&phy0>;
0197 phy-connection-type = "sgmii";
0198 };
0199
0200 ethernet@e2000 {
0201 phy-handle = <&phy1>;
0202 phy-connection-type = "sgmii";
0203 };
0204
0205 ethernet@e4000 {
0206 phy-handle = <&phy2>;
0207 phy-connection-type = "sgmii";
0208 };
0209
0210 ethernet@e6000 {
0211 phy-handle = <&phy3>;
0212 phy-connection-type = "sgmii";
0213 };
0214
0215 ethernet@f0000 {
0216 phy-handle = <&phy10>;
0217 phy-connection-type = "xgmii";
0218 };
0219 };
0220
0221 fman@500000 {
0222 ethernet@e0000 {
0223 phy-handle = <&phy5>;
0224 phy-connection-type = "sgmii";
0225 };
0226
0227 ethernet@e2000 {
0228 phy-handle = <&phy6>;
0229 phy-connection-type = "sgmii";
0230 };
0231
0232 ethernet@e4000 {
0233 phy-handle = <&phy7>;
0234 phy-connection-type = "sgmii";
0235 };
0236
0237 ethernet@e6000 {
0238 phy-handle = <&phy8>;
0239 phy-connection-type = "sgmii";
0240 };
0241
0242 ethernet@f0000 {
0243 phy-handle = <&phy11>;
0244 phy-connection-type = "xgmii";
0245 };
0246 };
0247 };
0248
0249 rio: rapidio@ffe0c0000 {
0250 reg = <0xf 0xfe0c0000 0 0x11000>;
0251
0252 port1 {
0253 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
0254 };
0255 port2 {
0256 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
0257 };
0258 };
0259
0260 lbc: localbus@ffe124000 {
0261 reg = <0xf 0xfe124000 0 0x1000>;
0262 ranges = <0 0 0xf 0xe8000000 0x08000000
0263 3 0 0xf 0xffdf0000 0x00008000>;
0264
0265 flash@0,0 {
0266 compatible = "cfi-flash";
0267 reg = <0 0 0x08000000>;
0268 bank-width = <2>;
0269 device-width = <2>;
0270 };
0271
0272 board-control@3,0 {
0273 compatible = "fsl,p4080ds-fpga", "fsl,fpga-ngpixis";
0274 reg = <3 0 0x30>;
0275 };
0276 };
0277
0278 pci0: pcie@ffe200000 {
0279 reg = <0xf 0xfe200000 0 0x1000>;
0280 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
0281 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
0282 pcie@0 {
0283 ranges = <0x02000000 0 0xe0000000
0284 0x02000000 0 0xe0000000
0285 0 0x20000000
0286
0287 0x01000000 0 0x00000000
0288 0x01000000 0 0x00000000
0289 0 0x00010000>;
0290 };
0291 };
0292
0293 pci1: pcie@ffe201000 {
0294 reg = <0xf 0xfe201000 0 0x1000>;
0295 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
0296 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
0297 pcie@0 {
0298 ranges = <0x02000000 0 0xe0000000
0299 0x02000000 0 0xe0000000
0300 0 0x20000000
0301
0302 0x01000000 0 0x00000000
0303 0x01000000 0 0x00000000
0304 0 0x00010000>;
0305 };
0306 };
0307
0308 pci2: pcie@ffe202000 {
0309 reg = <0xf 0xfe202000 0 0x1000>;
0310 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
0311 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
0312 pcie@0 {
0313 ranges = <0x02000000 0 0xe0000000
0314 0x02000000 0 0xe0000000
0315 0 0x20000000
0316
0317 0x01000000 0 0x00000000
0318 0x01000000 0 0x00000000
0319 0 0x00010000>;
0320 };
0321 };
0322
0323 mdio-mux-emi1 {
0324 #address-cells = <1>;
0325 #size-cells = <0>;
0326 compatible = "mdio-mux-gpio", "mdio-mux";
0327 mdio-parent-bus = <&mdio0>;
0328 gpios = <&gpio0 1 0>, <&gpio0 0 0>;
0329
0330 p4080mdio0: mdio@0 {
0331 #address-cells = <1>;
0332 #size-cells = <0>;
0333 reg = <0>;
0334
0335 phyrgmii: ethernet-phy@0 {
0336 reg = <0x0>;
0337 };
0338 };
0339
0340 p4080mdio1: mdio@1 {
0341 #address-cells = <1>;
0342 #size-cells = <0>;
0343 reg = <1>;
0344
0345 phy5: ethernet-phy@1c {
0346 reg = <0x1c>;
0347 };
0348
0349 phy6: ethernet-phy@1d {
0350 reg = <0x1d>;
0351 };
0352
0353 phy7: ethernet-phy@1e {
0354 reg = <0x1e>;
0355 };
0356
0357 phy8: ethernet-phy@1f {
0358 reg = <0x1f>;
0359 };
0360 };
0361
0362 p4080mdio2: mdio@2 {
0363 #address-cells = <1>;
0364 #size-cells = <0>;
0365 reg = <2>;
0366 status = "disabled";
0367
0368 phy5slot3: ethernet-phy@1c {
0369 reg = <0x1c>;
0370 };
0371
0372 phy6slot3: ethernet-phy@1d {
0373 reg = <0x1d>;
0374 };
0375
0376 phy7slot3: ethernet-phy@1e {
0377 reg = <0x1e>;
0378 };
0379
0380 phy8slot3: ethernet-phy@1f {
0381 reg = <0x1f>;
0382 };
0383 };
0384
0385 p4080mdio3: mdio@3 {
0386 #address-cells = <1>;
0387 #size-cells = <0>;
0388 reg = <3>;
0389
0390 phy0: ethernet-phy@1c {
0391 reg = <0x1c>;
0392 };
0393
0394 phy1: ethernet-phy@1d {
0395 reg = <0x1d>;
0396 };
0397
0398 phy2: ethernet-phy@1e {
0399 reg = <0x1e>;
0400 };
0401
0402 phy3: ethernet-phy@1f {
0403 reg = <0x1f>;
0404 };
0405 };
0406 };
0407
0408 mdio-mux-emi2 {
0409 #address-cells = <1>;
0410 #size-cells = <0>;
0411 compatible = "mdio-mux-gpio", "mdio-mux";
0412 mdio-parent-bus = <&xmdio0>;
0413 gpios = <&gpio0 3 0>, <&gpio0 2 0>;
0414
0415 p4080xmdio1: mdio@1 {
0416 #address-cells = <1>;
0417 #size-cells = <0>;
0418 reg = <1>;
0419
0420 phy11: ethernet-phy@0 {
0421 compatible = "ethernet-phy-ieee802.3-c45";
0422 reg = <0x0>;
0423 };
0424 };
0425
0426 p4080xmdio3: mdio@3 {
0427 #address-cells = <1>;
0428 #size-cells = <0>;
0429 reg = <3>;
0430
0431 phy10: ethernet-phy@4 {
0432 compatible = "ethernet-phy-ieee802.3-c45";
0433 reg = <0x4>;
0434 };
0435 };
0436 };
0437 };
0438
0439 /include/ "p4080si-post.dtsi"
