0001 /*
0002 * P2020/P2010 Silicon/SoC Device Tree Source (post include)
0003 *
0004 * Copyright 2011 Freescale Semiconductor Inc.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions are met:
0008 * * Redistributions of source code must retain the above copyright
0009 * notice, this list of conditions and the following disclaimer.
0010 * * Redistributions in binary form must reproduce the above copyright
0011 * notice, this list of conditions and the following disclaimer in the
0012 * documentation and/or other materials provided with the distribution.
0013 * * Neither the name of Freescale Semiconductor nor the
0014 * names of its contributors may be used to endorse or promote products
0015 * derived from this software without specific prior written permission.
0016 *
0017 *
0018 * ALTERNATIVELY, this software may be distributed under the terms of the
0019 * GNU General Public License ("GPL") as published by the Free Software
0020 * Foundation, either version 2 of that License or (at your option) any
0021 * later version.
0022 *
0023 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
0024 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0025 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0026 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0027 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0028 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0029 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0030 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0031 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0032 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0033 */
0034
0035 &lbc {
0036 #address-cells = <2>;
0037 #size-cells = <1>;
0038 compatible = "fsl,p2020-elbc", "fsl,elbc", "simple-bus";
0039 interrupts = <19 2 0 0>;
0040 };
0041
0042 /* controller at 0xa000 */
0043 &pci0 {
0044 compatible = "fsl,mpc8548-pcie";
0045 device_type = "pci";
0046 #size-cells = <2>;
0047 #address-cells = <3>;
0048 bus-range = <0 255>;
0049 clock-frequency = <33333333>;
0050 interrupts = <26 2 0 0>;
0051 law_trgt_if = <2>;
0052
0053 pcie@0 {
0054 reg = <0 0 0 0 0>;
0055 #interrupt-cells = <1>;
0056 #size-cells = <2>;
0057 #address-cells = <3>;
0058 device_type = "pci";
0059 interrupts = <26 2 0 0>;
0060 interrupt-map-mask = <0xf800 0 0 7>;
0061 interrupt-map = <
0062 /* IDSEL 0x0 */
0063 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
0064 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
0065 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
0066 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
0067 >;
0068 };
0069 };
0070
0071 /* controller at 0x9000 */
0072 &pci1 {
0073 compatible = "fsl,mpc8548-pcie";
0074 device_type = "pci";
0075 #size-cells = <2>;
0076 #address-cells = <3>;
0077 bus-range = <0 255>;
0078 clock-frequency = <33333333>;
0079 interrupts = <25 2 0 0>;
0080 law_trgt_if = <1>;
0081
0082 pcie@0 {
0083 reg = <0 0 0 0 0>;
0084 #interrupt-cells = <1>;
0085 #size-cells = <2>;
0086 #address-cells = <3>;
0087 device_type = "pci";
0088 interrupts = <25 2 0 0>;
0089 interrupt-map-mask = <0xf800 0 0 7>;
0090
0091 interrupt-map = <
0092 /* IDSEL 0x0 */
0093 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
0094 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
0095 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
0096 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
0097 >;
0098 };
0099 };
0100
0101 /* controller at 0x8000 */
0102 &pci2 {
0103 compatible = "fsl,mpc8548-pcie";
0104 device_type = "pci";
0105 #size-cells = <2>;
0106 #address-cells = <3>;
0107 bus-range = <0 255>;
0108 clock-frequency = <33333333>;
0109 interrupts = <24 2 0 0>;
0110 law_trgt_if = <0>;
0111
0112 pcie@0 {
0113 reg = <0 0 0 0 0>;
0114 #interrupt-cells = <1>;
0115 #size-cells = <2>;
0116 #address-cells = <3>;
0117 device_type = "pci";
0118 interrupts = <24 2 0 0>;
0119 interrupt-map-mask = <0xf800 0 0 7>;
0120
0121 interrupt-map = <
0122 /* IDSEL 0x0 */
0123 0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
0124 0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
0125 0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
0126 0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
0127 >;
0128 };
0129 };
0130
0131 &soc {
0132 #address-cells = <1>;
0133 #size-cells = <1>;
0134 device_type = "soc";
0135 compatible = "fsl,p2020-immr", "simple-bus";
0136 bus-frequency = <0>; // Filled out by uboot.
0137
0138 ecm-law@0 {
0139 compatible = "fsl,ecm-law";
0140 reg = <0x0 0x1000>;
0141 fsl,num-laws = <12>;
0142 };
0143
0144 ecm@1000 {
0145 compatible = "fsl,p2020-ecm", "fsl,ecm";
0146 reg = <0x1000 0x1000>;
0147 interrupts = <17 2 0 0>;
0148 };
0149
0150 memory-controller@2000 {
0151 compatible = "fsl,p2020-memory-controller";
0152 reg = <0x2000 0x1000>;
0153 interrupts = <18 2 0 0>;
0154 };
0155
0156 /include/ "pq3-i2c-0.dtsi"
0157 /include/ "pq3-i2c-1.dtsi"
0158 /include/ "pq3-duart-0.dtsi"
0159 /include/ "pq3-espi-0.dtsi"
0160 spi0: spi@7000 {
0161 fsl,espi-num-chipselects = <4>;
0162 };
0163
0164 /include/ "pq3-dma-1.dtsi"
0165 /include/ "pq3-gpio-0.dtsi"
0166
0167 L2: l2-cache-controller@20000 {
0168 compatible = "fsl,p2020-l2-cache-controller";
0169 reg = <0x20000 0x1000>;
0170 cache-line-size = <32>; // 32 bytes
0171 cache-size = <0x80000>; // L2,512K
0172 interrupts = <16 2 0 0>;
0173 };
0174
0175 /include/ "pq3-dma-0.dtsi"
0176 /include/ "pq3-usb2-dr-0.dtsi"
0177 usb@22000 {
0178 compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
0179 };
0180 /include/ "pq3-etsec1-0.dtsi"
0181 /include/ "pq3-etsec1-timer-0.dtsi"
0182
0183 ptp_clock@24e00 {
0184 interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>;
0185 };
0186
0187
0188 /include/ "pq3-etsec1-1.dtsi"
0189 /include/ "pq3-etsec1-2.dtsi"
0190 /include/ "pq3-esdhc-0.dtsi"
0191 sdhc@2e000 {
0192 compatible = "fsl,p2020-esdhc", "fsl,esdhc";
0193 };
0194
0195 /include/ "pq3-sec3.1-0.dtsi"
0196 /include/ "pq3-mpic.dtsi"
0197 /include/ "pq3-mpic-timer-B.dtsi"
0198
0199 global-utilities@e0000 {
0200 compatible = "fsl,p2020-guts";
0201 reg = <0xe0000 0x1000>;
0202 fsl,has-rstcr;
0203 };
0204
0205 pmc: power@e0070 {
0206 compatible = "fsl,mpc8548-pmc";
0207 reg = <0xe0070 0x20>;
0208 };
0209 };
