0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * P2020 DS Device Tree Source
0004 *
0005 * Copyright 2009-2011 Freescale Semiconductor Inc.
0006 */
0007
0008 /include/ "p2020si-pre.dtsi"
0009
0010 / {
0011 model = "fsl,P2020DS";
0012 compatible = "fsl,P2020DS";
0013
0014 memory {
0015 device_type = "memory";
0016 };
0017
0018 board_lbc: lbc: localbus@ffe05000 {
0019 ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
0020 0x1 0x0 0x0 0xe0000000 0x08000000
0021 0x2 0x0 0x0 0xffa00000 0x00040000
0022 0x3 0x0 0x0 0xffdf0000 0x00008000
0023 0x4 0x0 0x0 0xffa40000 0x00040000
0024 0x5 0x0 0x0 0xffa80000 0x00040000
0025 0x6 0x0 0x0 0xffac0000 0x00040000>;
0026 reg = <0 0xffe05000 0 0x1000>;
0027 };
0028
0029 board_soc: soc: soc@ffe00000 {
0030 ranges = <0x0 0x0 0xffe00000 0x100000>;
0031 };
0032
0033 pci2: pcie@ffe08000 {
0034 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0035 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
0036 reg = <0 0xffe08000 0 0x1000>;
0037 pcie@0 {
0038 ranges = <0x2000000 0x0 0x80000000
0039 0x2000000 0x0 0x80000000
0040 0x0 0x20000000
0041
0042 0x1000000 0x0 0x0
0043 0x1000000 0x0 0x0
0044 0x0 0x10000>;
0045 };
0046 };
0047
0048 board_pci1: pci1: pcie@ffe09000 {
0049 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0050 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
0051 reg = <0 0xffe09000 0 0x1000>;
0052 pcie@0 {
0053 ranges = <0x2000000 0x0 0xa0000000
0054 0x2000000 0x0 0xa0000000
0055 0x0 0x20000000
0056
0057 0x1000000 0x0 0x0
0058 0x1000000 0x0 0x0
0059 0x0 0x10000>;
0060 };
0061 };
0062
0063 pci0: pcie@ffe0a000 {
0064 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
0065 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
0066 reg = <0 0xffe0a000 0 0x1000>;
0067 pcie@0 {
0068 ranges = <0x2000000 0x0 0xc0000000
0069 0x2000000 0x0 0xc0000000
0070 0x0 0x20000000
0071
0072 0x1000000 0x0 0x0
0073 0x1000000 0x0 0x0
0074 0x0 0x10000>;
0075 };
0076 };
0077 };
0078
0079 /*
0080 * p2020ds.dtsi must be last to ensure board_pci0 overrides pci0 settings
0081 * for interrupt-map & interrupt-map-mask
0082 */
0083
0084 /include/ "p2020si-post.dtsi"
0085 /include/ "p2020ds.dtsi"
