0001 /*
0002 * P1025 TWR Device Tree Source (32-bit address map)
0003 *
0004 * Copyright 2013 Freescale Semiconductor Inc.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions are met:
0008 * * Redistributions of source code must retain the above copyright
0009 * notice, this list of conditions and the following disclaimer.
0010 * * Redistributions in binary form must reproduce the above copyright
0011 * notice, this list of conditions and the following disclaimer in the
0012 * documentation and/or other materials provided with the distribution.
0013 * * Neither the name of Freescale Semiconductor nor the
0014 * names of its contributors may be used to endorse or promote products
0015 * derived from this software without specific prior written permission.
0016 *
0017 *
0018 * ALTERNATIVELY, this software may be distributed under the terms of the
0019 * GNU General Public License ("GPL") as published by the Free Software
0020 * Foundation, either version 2 of that License or (at your option) any
0021 * later version.
0022 *
0023 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
0024 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0025 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0026 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0027 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0028 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0029 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0030 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0031 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0032 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0033 */
0034
0035 /include/ "p1021si-pre.dtsi"
0036 / {
0037 model = "fsl,P1025";
0038 compatible = "fsl,TWR-P1025";
0039
0040 memory {
0041 device_type = "memory";
0042 };
0043
0044 lbc: localbus@ffe05000 {
0045 reg = <0 0xffe05000 0 0x1000>;
0046
0047 /* NOR Flash and SSD1289 */
0048 ranges = <0x0 0x0 0x0 0xec000000 0x04000000
0049 0x2 0x0 0x0 0xe0000000 0x00020000>;
0050 };
0051
0052 soc: soc@ffe00000 {
0053 ranges = <0x0 0x0 0xffe00000 0x100000>;
0054 };
0055
0056 pci0: pcie@ffe09000 {
0057 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0058 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
0059 reg = <0 0xffe09000 0 0x1000>;
0060 pcie@0 {
0061 ranges = <0x2000000 0x0 0xa0000000
0062 0x2000000 0x0 0xa0000000
0063 0x0 0x20000000
0064
0065 0x1000000 0x0 0x0
0066 0x1000000 0x0 0x0
0067 0x0 0x100000>;
0068 };
0069 };
0070
0071 pci1: pcie@ffe0a000 {
0072 reg = <0 0xffe0a000 0 0x1000>;
0073 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0074 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
0075 pcie@0 {
0076 ranges = <0x2000000 0x0 0x80000000
0077 0x2000000 0x0 0x80000000
0078 0x0 0x20000000
0079
0080 0x1000000 0x0 0x0
0081 0x1000000 0x0 0x0
0082 0x0 0x100000>;
0083 };
0084 };
0085
0086 qe: qe@ffe80000 {
0087 ranges = <0x0 0x0 0xffe80000 0x40000>;
0088 reg = <0 0xffe80000 0 0x480>;
0089 brg-frequency = <0>;
0090 bus-frequency = <0>;
0091 };
0092 };
0093
0094 /include/ "p1025twr.dtsi"
0095 /include/ "p1021si-post.dtsi"
