0001 /*
0002 * P1022 RDK 32-bit Physical Address Map Device Tree Source
0003 *
0004 * Copyright 2012 Freescale Semiconductor Inc.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions are met:
0008 * * Redistributions of source code must retain the above copyright
0009 * notice, this list of conditions and the following disclaimer.
0010 * * Redistributions in binary form must reproduce the above copyright
0011 * notice, this list of conditions and the following disclaimer in the
0012 * documentation and/or other materials provided with the distribution.
0013 * * Neither the name of Freescale Semiconductor nor the
0014 * names of its contributors may be used to endorse or promote products
0015 * derived from this software without specific prior written permission.
0016 *
0017 *
0018 * ALTERNATIVELY, this software may be distributed under the terms of the
0019 * GNU General Public License ("GPL") as published by the Free Software
0020 * Foundation, either version 2 of that License or (at your option) any
0021 * later version.
0022 *
0023 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
0024 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0025 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0026 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0027 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0028 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0029 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0030 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0031 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0032 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0033 */
0034
0035 /include/ "p1022si-pre.dtsi"
0036 / {
0037 model = "fsl,P1022RDK";
0038 compatible = "fsl,P1022RDK";
0039
0040 memory {
0041 device_type = "memory";
0042 };
0043
0044 board_lbc: lbc: localbus@ffe05000 {
0045 /* The P1022 RDK does not have any localbus devices */
0046 status = "disabled";
0047 };
0048
0049 board_soc: soc: soc@ffe00000 {
0050 ranges = <0x0 0x0 0xffe00000 0x100000>;
0051
0052 i2c@3100 {
0053 wm8960:codec@1a {
0054 compatible = "wlf,wm8960";
0055 reg = <0x1a>;
0056 /* MCLK source is a stand-alone oscillator */
0057 clock-frequency = <12288000>;
0058 };
0059 rtc@68 {
0060 compatible = "st,m41t62";
0061 reg = <0x68>;
0062 };
0063 adt7461@4c{
0064 compatible = "adi,adt7461";
0065 reg = <0x4c>;
0066 };
0067 zl6100@21{
0068 compatible = "isil,zl6100";
0069 reg = <0x21>;
0070 };
0071 zl6100@24{
0072 compatible = "isil,zl6100";
0073 reg = <0x24>;
0074 };
0075 zl6100@26{
0076 compatible = "isil,zl6100";
0077 reg = <0x26>;
0078 };
0079 zl6100@29{
0080 compatible = "isil,zl6100";
0081 reg = <0x29>;
0082 };
0083 };
0084
0085 spi@7000 {
0086 flash@0 {
0087 #address-cells = <1>;
0088 #size-cells = <1>;
0089 compatible = "spansion,m25p80", "jedec,spi-nor";
0090 reg = <0>;
0091 spi-max-frequency = <1000000>;
0092 partition@0 {
0093 label = "full-spi-flash";
0094 reg = <0x00000000 0x00100000>;
0095 };
0096 };
0097 };
0098
0099 ssi@15000 {
0100 fsl,mode = "i2s-slave";
0101 codec-handle = <&wm8960>;
0102 };
0103
0104 usb@22000 {
0105 phy_type = "ulpi";
0106 };
0107
0108 usb@23000 {
0109 phy_type = "ulpi";
0110 };
0111
0112 mdio@24000 {
0113 phy0: ethernet-phy@0 {
0114 interrupts = <3 1 0 0>;
0115 reg = <0x1>;
0116 };
0117 phy1: ethernet-phy@1 {
0118 interrupts = <9 1 0 0>;
0119 reg = <0x2>;
0120 };
0121 };
0122
0123 mdio@25000 {
0124 tbi0: tbi-phy@11 {
0125 reg = <0x11>;
0126 device_type = "tbi-phy";
0127 };
0128 };
0129
0130 ethernet@b0000 {
0131 phy-handle = <&phy0>;
0132 phy-connection-type = "rgmii-id";
0133 };
0134
0135 ethernet@b1000 {
0136 phy-handle = <&phy1>;
0137 tbi-handle = <&tbi0>;
0138 phy-connection-type = "sgmii";
0139 };
0140 };
0141
0142 pci0: pcie@ffe09000 {
0143 ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000
0144 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
0145 reg = <0x0 0xffe09000 0 0x1000>;
0146 pcie@0 {
0147 ranges = <0x2000000 0x0 0xe0000000
0148 0x2000000 0x0 0xe0000000
0149 0x0 0x20000000
0150
0151 0x1000000 0x0 0x0
0152 0x1000000 0x0 0x0
0153 0x0 0x100000>;
0154 };
0155 };
0156
0157 pci1: pcie@ffe0a000 {
0158 ranges = <0x2000000 0x0 0xe0000000 0 0xc0000000 0x0 0x20000000
0159 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
0160 reg = <0 0xffe0a000 0 0x1000>;
0161 pcie@0 {
0162 ranges = <0x2000000 0x0 0xe0000000
0163 0x2000000 0x0 0xe0000000
0164 0x0 0x20000000
0165
0166 0x1000000 0x0 0x0
0167 0x1000000 0x0 0x0
0168 0x0 0x100000>;
0169 };
0170 };
0171
0172 pci2: pcie@ffe0b000 {
0173 ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000
0174 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
0175 reg = <0 0xffe0b000 0 0x1000>;
0176 pcie@0 {
0177 ranges = <0x2000000 0x0 0xe0000000
0178 0x2000000 0x0 0xe0000000
0179 0x0 0x20000000
0180
0181 0x1000000 0x0 0x0
0182 0x1000000 0x0 0x0
0183 0x0 0x100000>;
0184 };
0185 };
0186 };
0187
0188 /include/ "p1022si-post.dtsi"
