0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * P1021 MDS Device Tree Source
0004 *
0005 * Copyright 2010,2012 Freescale Semiconductor Inc.
0006 */
0007
0008 /include/ "p1021si-pre.dtsi"
0009 / {
0010 model = "fsl,P1021";
0011 compatible = "fsl,P1021MDS";
0012
0013 aliases {
0014 ethernet3 = &enet3;
0015 ethernet4 = &enet4;
0016 };
0017
0018 memory {
0019 device_type = "memory";
0020 };
0021
0022 lbc: localbus@ffe05000 {
0023 reg = <0x0 0xffe05000 0x0 0x1000>;
0024
0025 /* NAND Flash, BCSR, PMC0/1*/
0026 ranges = <0x0 0x0 0x0 0xfc000000 0x02000000
0027 0x1 0x0 0x0 0xf8000000 0x00008000
0028 0x2 0x0 0x0 0xf8010000 0x00020000
0029 0x3 0x0 0x0 0xf8020000 0x00020000>;
0030
0031 nand@0,0 {
0032 #address-cells = <1>;
0033 #size-cells = <1>;
0034 compatible = "fsl,p1021-fcm-nand",
0035 "fsl,elbc-fcm-nand";
0036 reg = <0x0 0x0 0x40000>;
0037
0038 partition@0 {
0039 /* This location must not be altered */
0040 /* 1MB for u-boot Bootloader Image */
0041 reg = <0x0 0x00100000>;
0042 label = "NAND (RO) U-Boot Image";
0043 read-only;
0044 };
0045
0046 partition@100000 {
0047 /* 1MB for DTB Image */
0048 reg = <0x00100000 0x00100000>;
0049 label = "NAND (RO) DTB Image";
0050 read-only;
0051 };
0052
0053 partition@200000 {
0054 /* 4MB for Linux Kernel Image */
0055 reg = <0x00200000 0x00400000>;
0056 label = "NAND (RO) Linux Kernel Image";
0057 read-only;
0058 };
0059
0060 partition@600000 {
0061 /* 5MB for Compressed Root file System Image */
0062 reg = <0x00600000 0x00500000>;
0063 label = "NAND (RO) Compressed RFS Image";
0064 read-only;
0065 };
0066
0067 partition@b00000 {
0068 /* 6MB for JFFS2 based Root file System */
0069 reg = <0x00a00000 0x00600000>;
0070 label = "NAND (RW) JFFS2 Root File System";
0071 };
0072
0073 partition@1100000 {
0074 /* 14MB for JFFS2 based Root file System */
0075 reg = <0x01100000 0x00e00000>;
0076 label = "NAND (RW) Writable User area";
0077 };
0078
0079 partition@1f00000 {
0080 /* 1MB for microcode */
0081 reg = <0x01f00000 0x00100000>;
0082 label = "NAND (RO) QE Ucode";
0083 read-only;
0084 };
0085 };
0086
0087 bcsr@1,0 {
0088 #address-cells = <1>;
0089 #size-cells = <1>;
0090 compatible = "fsl,p1021mds-bcsr";
0091 reg = <1 0 0x8000>;
0092 ranges = <0 1 0 0x8000>;
0093 };
0094
0095 pib@2,0 {
0096 compatible = "fsl,p1021mds-pib";
0097 reg = <2 0 0x10000>;
0098 };
0099
0100 pib@3,0 {
0101 compatible = "fsl,p1021mds-pib";
0102 reg = <3 0 0x10000>;
0103 };
0104 };
0105
0106 soc: soc@ffe00000 {
0107 compatible = "fsl,p1021-immr", "simple-bus";
0108 ranges = <0x0 0x0 0xffe00000 0x100000>;
0109
0110 i2c@3000 {
0111 rtc@68 {
0112 compatible = "dallas,ds1374";
0113 reg = <0x68>;
0114 };
0115 };
0116
0117 spi@7000 {
0118
0119 flash@0 {
0120 #address-cells = <1>;
0121 #size-cells = <1>;
0122 compatible = "spansion,s25sl12801", "jedec,spi-nor";
0123 reg = <0>;
0124 spi-max-frequency = <40000000>; /* input clock */
0125
0126 partition@u-boot {
0127 label = "u-boot-spi";
0128 reg = <0x00000000 0x00100000>;
0129 read-only;
0130 };
0131 partition@kernel {
0132 label = "kernel-spi";
0133 reg = <0x00100000 0x00500000>;
0134 read-only;
0135 };
0136 partition@dtb {
0137 label = "dtb-spi";
0138 reg = <0x00600000 0x00100000>;
0139 read-only;
0140 };
0141 partition@fs {
0142 label = "file system-spi";
0143 reg = <0x00700000 0x00900000>;
0144 };
0145 };
0146 };
0147
0148 usb@22000 {
0149 phy_type = "ulpi";
0150 dr_mode = "host";
0151 };
0152
0153 mdio@24000 {
0154 phy0: ethernet-phy@0 {
0155 interrupts = <1 1 0 0>;
0156 reg = <0x0>;
0157 };
0158 phy1: ethernet-phy@1 {
0159 interrupts = <2 1 0 0>;
0160 reg = <0x1>;
0161 };
0162 phy4: ethernet-phy@4 {
0163 reg = <0x4>;
0164 };
0165 tbi-phy@5 {
0166 device_type = "tbi-phy";
0167 reg = <0x5>;
0168 };
0169 };
0170
0171 mdio@25000 {
0172 tbi0: tbi-phy@11 {
0173 reg = <0x11>;
0174 device_type = "tbi-phy";
0175 };
0176 };
0177
0178 ethernet@b0000 {
0179 phy-handle = <&phy0>;
0180 phy-connection-type = "rgmii-id";
0181 };
0182
0183 ethernet@b1000 {
0184 phy-handle = <&phy4>;
0185 tbi-handle = <&tbi0>;
0186 phy-connection-type = "sgmii";
0187 };
0188
0189 ethernet@b2000 {
0190 phy-handle = <&phy1>;
0191 phy-connection-type = "rgmii-id";
0192 };
0193
0194 par_io@e0100 {
0195 #address-cells = <1>;
0196 #size-cells = <1>;
0197 reg = <0xe0100 0x60>;
0198 ranges = <0x0 0xe0100 0x60>;
0199 device_type = "par_io";
0200 num-ports = <3>;
0201 pio1: ucc_pin@1 {
0202 pio-map = <
0203 /* port pin dir open_drain assignment has_irq */
0204 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
0205 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */
0206 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
0207 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
0208 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
0209 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
0210 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
0211 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
0212 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */
0213 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */
0214 0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */
0215 0x0 0xf 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */
0216 0x0 0x5 0x1 0x0 0x2 0x0 /* ENET1_TX_EN_SER1_RTS_B */
0217 0x0 0xd 0x1 0x0 0x2 0x0 /* ENET1_TX_ER */
0218 0x0 0x4 0x2 0x0 0x2 0x0 /* ENET1_RX_DV_SER1_CTS_B */
0219 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RX_ER_SER1_CD_B */
0220 0x0 0x11 0x2 0x0 0x2 0x0 /* ENET1_CRS */
0221 0x0 0x10 0x2 0x0 0x2 0x0>; /* ENET1_COL */
0222 };
0223
0224 pio2: ucc_pin@2 {
0225 pio-map = <
0226 /* port pin dir open_drain assignment has_irq */
0227 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
0228 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */
0229 0x1 0xb 0x2 0x0 0x1 0x0 /* CLK13 */
0230 0x1 0x7 0x1 0x0 0x2 0x0 /* ENET5_TXD0_SER5_TXD0 */
0231 0x1 0xa 0x1 0x0 0x2 0x0 /* ENET5_TXD1_SER5_TXD1 */
0232 0x1 0x6 0x2 0x0 0x2 0x0 /* ENET5_RXD0_SER5_RXD0 */
0233 0x1 0x9 0x2 0x0 0x2 0x0 /* ENET5_RXD1_SER5_RXD1 */
0234 0x1 0x5 0x1 0x0 0x2 0x0 /* ENET5_TX_EN_SER5_RTS_B */
0235 0x1 0x4 0x2 0x0 0x2 0x0 /* ENET5_RX_DV_SER5_CTS_B */
0236 0x1 0x8 0x2 0x0 0x2 0x0>; /* ENET5_RX_ER_SER5_CD_B */
0237 };
0238 };
0239 };
0240
0241 pci0: pcie@ffe09000 {
0242 reg = <0 0xffe09000 0 0x1000>;
0243 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0244 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
0245 pcie@0 {
0246 ranges = <0x2000000 0x0 0xa0000000
0247 0x2000000 0x0 0xa0000000
0248 0x0 0x20000000
0249
0250 0x1000000 0x0 0x0
0251 0x1000000 0x0 0x0
0252 0x0 0x100000>;
0253 };
0254 };
0255
0256 pci1: pcie@ffe0a000 {
0257 reg = <0 0xffe0a000 0 0x1000>;
0258 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
0259 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
0260 pcie@0 {
0261 ranges = <0x2000000 0x0 0xc0000000
0262 0x2000000 0x0 0xc0000000
0263 0x0 0x20000000
0264
0265 0x1000000 0x0 0x0
0266 0x1000000 0x0 0x0
0267 0x0 0x100000>;
0268 };
0269 };
0270
0271 qe: qe@ffe80000 {
0272 ranges = <0x0 0x0 0xffe80000 0x40000>;
0273 reg = <0 0xffe80000 0 0x480>;
0274 brg-frequency = <0>;
0275 bus-frequency = <0>;
0276 status = "disabled"; /* no firmware loaded */
0277
0278 enet3: ucc@2000 {
0279 device_type = "network";
0280 compatible = "ucc_geth";
0281 local-mac-address = [ 00 00 00 00 00 00 ];
0282 rx-clock-name = "clk12";
0283 tx-clock-name = "clk9";
0284 pio-handle = <&pio1>;
0285 phy-handle = <&qe_phy0>;
0286 phy-connection-type = "mii";
0287 };
0288
0289 mdio@2120 {
0290 qe_phy0: ethernet-phy@0 {
0291 interrupt-parent = <&mpic>;
0292 interrupts = <4 1 0 0>;
0293 reg = <0x0>;
0294 };
0295 qe_phy1: ethernet-phy@3 {
0296 interrupt-parent = <&mpic>;
0297 interrupts = <5 1 0 0>;
0298 reg = <0x3>;
0299 };
0300 tbi-phy@11 {
0301 reg = <0x11>;
0302 device_type = "tbi-phy";
0303 };
0304 };
0305
0306 enet4: ucc@2400 {
0307 device_type = "network";
0308 compatible = "ucc_geth";
0309 local-mac-address = [ 00 00 00 00 00 00 ];
0310 rx-clock-name = "none";
0311 tx-clock-name = "clk13";
0312 pio-handle = <&pio2>;
0313 phy-handle = <&qe_phy1>;
0314 phy-connection-type = "rmii";
0315 };
0316 };
0317 };
0318
0319 /include/ "p1021si-post.dtsi"
