0001 /*
0002 * P1020/P1011 Silicon/SoC Device Tree Source (pre include)
0003 *
0004 * Copyright 2011 Freescale Semiconductor Inc.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions are met:
0008 * * Redistributions of source code must retain the above copyright
0009 * notice, this list of conditions and the following disclaimer.
0010 * * Redistributions in binary form must reproduce the above copyright
0011 * notice, this list of conditions and the following disclaimer in the
0012 * documentation and/or other materials provided with the distribution.
0013 * * Neither the name of Freescale Semiconductor nor the
0014 * names of its contributors may be used to endorse or promote products
0015 * derived from this software without specific prior written permission.
0016 *
0017 *
0018 * ALTERNATIVELY, this software may be distributed under the terms of the
0019 * GNU General Public License ("GPL") as published by the Free Software
0020 * Foundation, either version 2 of that License or (at your option) any
0021 * later version.
0022 *
0023 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
0024 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0025 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0026 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0027 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0028 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0029 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0030 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0031 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0032 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0033 */
0034
0035 /dts-v1/;
0036
0037 /include/ "e500v2_power_isa.dtsi"
0038
0039 / {
0040 compatible = "fsl,P1020";
0041 #address-cells = <2>;
0042 #size-cells = <2>;
0043 interrupt-parent = <&mpic>;
0044
0045 aliases {
0046 serial0 = &serial0;
0047 serial1 = &serial1;
0048 ethernet0 = &enet0;
0049 ethernet1 = &enet1;
0050 ethernet2 = &enet2;
0051 pci0 = &pci0;
0052 pci1 = &pci1;
0053 };
0054
0055 cpus {
0056 #address-cells = <1>;
0057 #size-cells = <0>;
0058
0059 PowerPC,P1020@0 {
0060 device_type = "cpu";
0061 reg = <0x0>;
0062 next-level-cache = <&L2>;
0063 };
0064
0065 PowerPC,P1020@1 {
0066 device_type = "cpu";
0067 reg = <0x1>;
0068 next-level-cache = <&L2>;
0069 };
0070 };
0071 };
