0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * P1020 RDB Device Tree Source (36-bit address map)
0004 *
0005 * Copyright 2009-2011 Freescale Semiconductor Inc.
0006 */
0007
0008 /include/ "p1020si-pre.dtsi"
0009 / {
0010 model = "fsl,P1020RDB";
0011 compatible = "fsl,P1020RDB";
0012
0013 memory {
0014 device_type = "memory";
0015 };
0016
0017 board_lbc: lbc: localbus@fffe05000 {
0018 reg = <0xf 0xffe05000 0 0x1000>;
0019
0020 /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
0021 ranges = <0x0 0x0 0xf 0xef000000 0x01000000
0022 0x1 0x0 0xf 0xffa00000 0x00040000
0023 0x2 0x0 0xf 0xffb00000 0x00020000>;
0024 };
0025
0026 board_soc: soc: soc@fffe00000 {
0027 ranges = <0x0 0xf 0xffe00000 0x100000>;
0028 };
0029
0030 pci0: pcie@fffe09000 {
0031 reg = <0xf 0xffe09000 0 0x1000>;
0032 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
0033 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
0034 pcie@0 {
0035 ranges = <0x2000000 0x0 0xc0000000
0036 0x2000000 0x0 0xc0000000
0037 0x0 0x20000000
0038
0039 0x1000000 0x0 0x0
0040 0x1000000 0x0 0x0
0041 0x0 0x100000>;
0042 };
0043 };
0044
0045 pci1: pcie@fffe0a000 {
0046 reg = <0xf 0xffe0a000 0 0x1000>;
0047 ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
0048 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
0049 pcie@0 {
0050 ranges = <0x2000000 0x0 0x80000000
0051 0x2000000 0x0 0x80000000
0052 0x0 0x20000000
0053
0054 0x1000000 0x0 0x0
0055 0x1000000 0x0 0x0
0056 0x0 0x100000>;
0057 };
0058 };
0059 };
0060
0061 /include/ "p1020rdb.dtsi"
0062 /include/ "p1020si-post.dtsi"
