dts/fsl/p1020rdb-pc_camp_core0.dts

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * P1020 RDB-PC  Core0 Device Tree Source in CAMP mode.
0004  *
0005  * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
0006  * can be shared, all the other devices must be assigned to one core only.
0007  * This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb,
0008  * eth1, eth2, sdhc, crypto, global-util, message, pci0, pci1, msi.
0009  *
0010  * Please note to add "-b 0" for core0's dts compiling.
0011  *
0012  * Copyright 2012 Freescale Semiconductor Inc.
0013  */
0014
0015 /include/ "p1020rdb-pc_32b.dts"
0016
0017 / {
0018         model = "fsl,P1020RDB-PC";
0019         compatible = "fsl,P1020RDB-PC";
0020
0021         aliases {
0022                 ethernet1 = &enet1;
0023                 ethernet2 = &enet2;
0024                 serial0 = &serial0;
0025                 pci0 = &pci0;
0026                 pci1 = &pci1;
0027         };
0028
0029         cpus {
0030                 PowerPC,P1020@1 {
0031                         status = "disabled";
0032                 };
0033         };
0034
0035         memory {
0036                 device_type = "memory";
0037         };
0038
0039         localbus@ffe05000 {
0040                 status = "disabled";
0041         };
0042
0043         soc@ffe00000 {
0044                 serial1: serial@4600 {
0045                         status = "disabled";
0046                 };
0047
0048                 enet0: ethernet@b0000 {
0049                         status = "disabled";
0050                 };
0051
0052                 mpic: pic@40000 {
0053                         protected-sources = <
0054                         42 29 30 34     /* serial1, enet0-queue-group0 */
0055                         17 18 24 45     /* enet0-queue-group1, crypto */
0056                         >;
0057                         pic-no-reset;
0058                 };
0059         };
0060 };