0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * MPC8641 HPCN Device Tree Source
0004 *
0005 * Copyright 2008-2009 Freescale Semiconductor Inc.
0006 */
0007
0008 /include/ "mpc8641si-pre.dtsi"
0009
0010 / {
0011 model = "MPC8641HPCN";
0012 compatible = "fsl,mpc8641hpcn";
0013 #address-cells = <2>;
0014 #size-cells = <2>;
0015
0016 memory {
0017 device_type = "memory";
0018 reg = <0x0 0x00000000 0x0 0x40000000>; // 1G at 0x0
0019 };
0020
0021 lbc: localbus@fffe05000 {
0022 reg = <0x0f 0xffe05000 0x0 0x1000>;
0023
0024 ranges = <0 0 0xf 0xef800000 0x00800000
0025 2 0 0xf 0xffdf8000 0x00008000
0026 3 0 0xf 0xffdf0000 0x00008000>;
0027
0028 flash@0,0 {
0029 compatible = "cfi-flash";
0030 reg = <0 0 0x00800000>;
0031 bank-width = <2>;
0032 device-width = <2>;
0033 #address-cells = <1>;
0034 #size-cells = <1>;
0035 partition@0 {
0036 label = "kernel";
0037 reg = <0x00000000 0x00300000>;
0038 };
0039 partition@300000 {
0040 label = "firmware b";
0041 reg = <0x00300000 0x00100000>;
0042 read-only;
0043 };
0044 partition@400000 {
0045 label = "fs";
0046 reg = <0x00400000 0x00300000>;
0047 };
0048 partition@700000 {
0049 label = "firmware a";
0050 reg = <0x00700000 0x00100000>;
0051 read-only;
0052 };
0053 };
0054 };
0055
0056 soc: soc8641@fffe00000 {
0057 ranges = <0x00000000 0x0f 0xffe00000 0x00100000>;
0058
0059 enet0: ethernet@24000 {
0060 tbi-handle = <&tbi0>;
0061 phy-handle = <&phy0>;
0062 phy-connection-type = "rgmii-id";
0063 };
0064
0065 mdio@24520 {
0066 phy0: ethernet-phy@0 {
0067 interrupts = <10 1 0 0>;
0068 reg = <0>;
0069 };
0070 phy1: ethernet-phy@1 {
0071 interrupts = <10 1 0 0>;
0072 reg = <1>;
0073 };
0074 phy2: ethernet-phy@2 {
0075 interrupts = <10 1 0 0>;
0076 reg = <2>;
0077 };
0078 phy3: ethernet-phy@3 {
0079 interrupts = <10 1 0 0>;
0080 reg = <3>;
0081 };
0082 tbi0: tbi-phy@11 {
0083 reg = <0x11>;
0084 device_type = "tbi-phy";
0085 };
0086 };
0087
0088 enet1: ethernet@25000 {
0089 tbi-handle = <&tbi1>;
0090 phy-handle = <&phy1>;
0091 phy-connection-type = "rgmii-id";
0092 };
0093
0094 mdio@25520 {
0095 tbi1: tbi-phy@11 {
0096 reg = <0x11>;
0097 device_type = "tbi-phy";
0098 };
0099 };
0100
0101 enet2: ethernet@26000 {
0102 tbi-handle = <&tbi2>;
0103 phy-handle = <&phy2>;
0104 phy-connection-type = "rgmii-id";
0105 };
0106
0107 mdio@26520 {
0108 tbi2: tbi-phy@11 {
0109 reg = <0x11>;
0110 device_type = "tbi-phy";
0111 };
0112 };
0113
0114 enet3: ethernet@27000 {
0115 tbi-handle = <&tbi3>;
0116 phy-handle = <&phy3>;
0117 phy-connection-type = "rgmii-id";
0118 };
0119
0120 mdio@27520 {
0121 tbi3: tbi-phy@11 {
0122 reg = <0x11>;
0123 device_type = "tbi-phy";
0124 };
0125 };
0126 };
0127
0128 pci0: pcie@fffe08000 {
0129 reg = <0x0f 0xffe08000 0x0 0x1000>;
0130 ranges = <0x02000000 0x0 0xe0000000 0x0c 0x00000000 0x0 0x20000000
0131 0x01000000 0x0 0x00000000 0x0f 0xffc00000 0x0 0x00010000>;
0132 interrupt-map-mask = <0xff00 0 0 7>;
0133 interrupt-map = <
0134 /* IDSEL 0x11 func 0 - PCI slot 1 */
0135 0x8800 0 0 1 &mpic 2 1 0 0
0136 0x8800 0 0 2 &mpic 3 1 0 0
0137 0x8800 0 0 3 &mpic 4 1 0 0
0138 0x8800 0 0 4 &mpic 1 1 0 0
0139
0140 /* IDSEL 0x11 func 1 - PCI slot 1 */
0141 0x8900 0 0 1 &mpic 2 1 0 0
0142 0x8900 0 0 2 &mpic 3 1 0 0
0143 0x8900 0 0 3 &mpic 4 1 0 0
0144 0x8900 0 0 4 &mpic 1 1 0 0
0145
0146 /* IDSEL 0x11 func 2 - PCI slot 1 */
0147 0x8a00 0 0 1 &mpic 2 1 0 0
0148 0x8a00 0 0 2 &mpic 3 1 0 0
0149 0x8a00 0 0 3 &mpic 4 1 0 0
0150 0x8a00 0 0 4 &mpic 1 1 0 0
0151
0152 /* IDSEL 0x11 func 3 - PCI slot 1 */
0153 0x8b00 0 0 1 &mpic 2 1 0 0
0154 0x8b00 0 0 2 &mpic 3 1 0 0
0155 0x8b00 0 0 3 &mpic 4 1 0 0
0156 0x8b00 0 0 4 &mpic 1 1 0 0
0157
0158 /* IDSEL 0x11 func 4 - PCI slot 1 */
0159 0x8c00 0 0 1 &mpic 2 1 0 0
0160 0x8c00 0 0 2 &mpic 3 1 0 0
0161 0x8c00 0 0 3 &mpic 4 1 0 0
0162 0x8c00 0 0 4 &mpic 1 1 0 0
0163
0164 /* IDSEL 0x11 func 5 - PCI slot 1 */
0165 0x8d00 0 0 1 &mpic 2 1 0 0
0166 0x8d00 0 0 2 &mpic 3 1 0 0
0167 0x8d00 0 0 3 &mpic 4 1 0 0
0168 0x8d00 0 0 4 &mpic 1 1 0 0
0169
0170 /* IDSEL 0x11 func 6 - PCI slot 1 */
0171 0x8e00 0 0 1 &mpic 2 1 0 0
0172 0x8e00 0 0 2 &mpic 3 1 0 0
0173 0x8e00 0 0 3 &mpic 4 1 0 0
0174 0x8e00 0 0 4 &mpic 1 1 0 0
0175
0176 /* IDSEL 0x11 func 7 - PCI slot 1 */
0177 0x8f00 0 0 1 &mpic 2 1 0 0
0178 0x8f00 0 0 2 &mpic 3 1 0 0
0179 0x8f00 0 0 3 &mpic 4 1 0 0
0180 0x8f00 0 0 4 &mpic 1 1 0 0
0181
0182 /* IDSEL 0x12 func 0 - PCI slot 2 */
0183 0x9000 0 0 1 &mpic 3 1 0 0
0184 0x9000 0 0 2 &mpic 4 1 0 0
0185 0x9000 0 0 3 &mpic 1 1 0 0
0186 0x9000 0 0 4 &mpic 2 1 0 0
0187
0188 /* IDSEL 0x12 func 1 - PCI slot 2 */
0189 0x9100 0 0 1 &mpic 3 1 0 0
0190 0x9100 0 0 2 &mpic 4 1 0 0
0191 0x9100 0 0 3 &mpic 1 1 0 0
0192 0x9100 0 0 4 &mpic 2 1 0 0
0193
0194 /* IDSEL 0x12 func 2 - PCI slot 2 */
0195 0x9200 0 0 1 &mpic 3 1 0 0
0196 0x9200 0 0 2 &mpic 4 1 0 0
0197 0x9200 0 0 3 &mpic 1 1 0 0
0198 0x9200 0 0 4 &mpic 2 1 0 0
0199
0200 /* IDSEL 0x12 func 3 - PCI slot 2 */
0201 0x9300 0 0 1 &mpic 3 1 0 0
0202 0x9300 0 0 2 &mpic 4 1 0 0
0203 0x9300 0 0 3 &mpic 1 1 0 0
0204 0x9300 0 0 4 &mpic 2 1 0 0
0205
0206 /* IDSEL 0x12 func 4 - PCI slot 2 */
0207 0x9400 0 0 1 &mpic 3 1 0 0
0208 0x9400 0 0 2 &mpic 4 1 0 0
0209 0x9400 0 0 3 &mpic 1 1 0 0
0210 0x9400 0 0 4 &mpic 2 1 0 0
0211
0212 /* IDSEL 0x12 func 5 - PCI slot 2 */
0213 0x9500 0 0 1 &mpic 3 1 0 0
0214 0x9500 0 0 2 &mpic 4 1 0 0
0215 0x9500 0 0 3 &mpic 1 1 0 0
0216 0x9500 0 0 4 &mpic 2 1 0 0
0217
0218 /* IDSEL 0x12 func 6 - PCI slot 2 */
0219 0x9600 0 0 1 &mpic 3 1 0 0
0220 0x9600 0 0 2 &mpic 4 1 0 0
0221 0x9600 0 0 3 &mpic 1 1 0 0
0222 0x9600 0 0 4 &mpic 2 1 0 0
0223
0224 /* IDSEL 0x12 func 7 - PCI slot 2 */
0225 0x9700 0 0 1 &mpic 3 1 0 0
0226 0x9700 0 0 2 &mpic 4 1 0 0
0227 0x9700 0 0 3 &mpic 1 1 0 0
0228 0x9700 0 0 4 &mpic 2 1 0 0
0229
0230 // IDSEL 0x1c USB
0231 0xe000 0 0 1 &i8259 12 2
0232 0xe100 0 0 2 &i8259 9 2
0233 0xe200 0 0 3 &i8259 10 2
0234 0xe300 0 0 4 &i8259 11 2
0235
0236 // IDSEL 0x1d Audio
0237 0xe800 0 0 1 &i8259 6 2
0238
0239 // IDSEL 0x1e Legacy
0240 0xf000 0 0 1 &i8259 7 2
0241 0xf100 0 0 1 &i8259 7 2
0242
0243 // IDSEL 0x1f IDE/SATA
0244 0xf800 0 0 1 &i8259 14 2
0245 0xf900 0 0 1 &i8259 5 2
0246 >;
0247
0248 pcie@0 {
0249 ranges = <0x02000000 0x0 0xe0000000
0250 0x02000000 0x0 0xe0000000
0251 0x0 0x20000000
0252
0253 0x01000000 0x0 0x00000000
0254 0x01000000 0x0 0x00000000
0255 0x0 0x00010000>;
0256 uli1575@0 {
0257 reg = <0 0 0 0 0>;
0258 #size-cells = <2>;
0259 #address-cells = <3>;
0260 ranges = <0x02000000 0x0 0xe0000000
0261 0x02000000 0x0 0xe0000000
0262 0x0 0x20000000
0263 0x01000000 0x0 0x00000000
0264 0x01000000 0x0 0x00000000
0265 0x0 0x00010000>;
0266 isa@1e {
0267 device_type = "isa";
0268 #size-cells = <1>;
0269 #address-cells = <2>;
0270 reg = <0xf000 0 0 0 0>;
0271 ranges = <1 0 0x01000000 0 0
0272 0x00001000>;
0273 interrupt-parent = <&i8259>;
0274
0275 i8259: interrupt-controller@20 {
0276 reg = <1 0x20 2
0277 1 0xa0 2
0278 1 0x4d0 2>;
0279 interrupt-controller;
0280 device_type = "interrupt-controller";
0281 #address-cells = <0>;
0282 #interrupt-cells = <2>;
0283 compatible = "chrp,iic";
0284 interrupts = <9 2 0 0>;
0285 };
0286
0287 i8042@60 {
0288 #size-cells = <0>;
0289 #address-cells = <1>;
0290 reg = <1 0x60 1 1 0x64 1>;
0291 interrupts = <1 3 12 3>;
0292 interrupt-parent = <&i8259>;
0293
0294 keyboard@0 {
0295 reg = <0>;
0296 compatible = "pnpPNP,303";
0297 };
0298
0299 mouse@1 {
0300 reg = <1>;
0301 compatible = "pnpPNP,f03";
0302 };
0303 };
0304
0305 rtc@70 {
0306 compatible =
0307 "pnpPNP,b00";
0308 reg = <1 0x70 2>;
0309 };
0310
0311 gpio@400 {
0312 reg = <1 0x400 0x80>;
0313 };
0314 };
0315 };
0316 };
0317
0318 };
0319
0320 pci1: pcie@fffe09000 {
0321 reg = <0x0f 0xffe09000 0x0 0x1000>;
0322 ranges = <0x02000000 0x0 0xe0000000 0x0c 0x20000000 0x0 0x20000000
0323 0x01000000 0x0 0x00000000 0x0f 0xffc10000 0x0 0x00010000>;
0324
0325 pcie@0 {
0326 ranges = <0x02000000 0x0 0xe0000000
0327 0x02000000 0x0 0xe0000000
0328 0x0 0x20000000
0329
0330 0x01000000 0x0 0x00000000
0331 0x01000000 0x0 0x00000000
0332 0x0 0x00010000>;
0333 };
0334 };
0335 };
0336
0337 /include/ "mpc8641si-post.dtsi"
