0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * MPC8572 DS Core0 Device Tree Source in CAMP mode.
0004 *
0005 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
0006 * can be shared, all the other devices must be assigned to one core only.
0007 * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0,
0008 * eth1, crypto, pci0, pci1.
0009 *
0010 * Copyright 2007-2009 Freescale Semiconductor Inc.
0011 */
0012
0013 /include/ "mpc8572ds.dts"
0014
0015 / {
0016 model = "fsl,MPC8572DS";
0017 compatible = "fsl,MPC8572DS", "fsl,MPC8572DS-CAMP";
0018
0019 cpus {
0020 PowerPC,8572@0 {
0021 };
0022 PowerPC,8572@1 {
0023 status = "disabled";
0024 };
0025 };
0026
0027 localbus@ffe05000 {
0028 status = "disabled";
0029 };
0030
0031 soc8572@ffe00000 {
0032 serial@4600 {
0033 status = "disabled";
0034 };
0035 dma@c300 {
0036 status = "disabled";
0037 };
0038 gpio-controller@f000 {
0039 };
0040 l2-cache-controller@20000 {
0041 cache-size = <0x80000>; // L2, 512K
0042 };
0043 ethernet@26000 {
0044 status = "disabled";
0045 };
0046 mdio@26520 {
0047 status = "disabled";
0048 };
0049 ethernet@27000 {
0050 status = "disabled";
0051 };
0052 mdio@27520 {
0053 status = "disabled";
0054 };
0055 pic@40000 {
0056 protected-sources = <
0057 31 32 33 37 38 39 /* enet2 enet3 */
0058 76 77 78 79 26 42 /* dma2 pci2 serial*/
0059 0xe4 0xe5 0xe6 0xe7 /* msi */
0060 >;
0061 };
0062
0063 msi@41600 {
0064 msi-available-ranges = <0 0x80>;
0065 interrupts = <
0066 0xe0 0 0 0
0067 0xe1 0 0 0
0068 0xe2 0 0 0
0069 0xe3 0 0 0>;
0070 };
0071 timer@42100 {
0072 status = "disabled";
0073 };
0074 };
0075 pcie@ffe0a000 {
0076 status = "disabled";
0077 };
0078 };
