0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * MPC8560 ADS Device Tree Source
0004 *
0005 * Copyright 2006, 2008 Freescale Semiconductor Inc.
0006 */
0007
0008 /dts-v1/;
0009
0010 /include/ "e500v2_power_isa.dtsi"
0011
0012 / {
0013 model = "MPC8560ADS";
0014 compatible = "MPC8560ADS", "MPC85xxADS";
0015 #address-cells = <1>;
0016 #size-cells = <1>;
0017
0018 aliases {
0019 ethernet0 = &enet0;
0020 ethernet1 = &enet1;
0021 ethernet2 = &enet2;
0022 ethernet3 = &enet3;
0023 serial0 = &serial0;
0024 serial1 = &serial1;
0025 pci0 = &pci0;
0026 };
0027
0028 cpus {
0029 #address-cells = <1>;
0030 #size-cells = <0>;
0031
0032 PowerPC,8560@0 {
0033 device_type = "cpu";
0034 reg = <0x0>;
0035 d-cache-line-size = <32>; // 32 bytes
0036 i-cache-line-size = <32>; // 32 bytes
0037 d-cache-size = <0x8000>; // L1, 32K
0038 i-cache-size = <0x8000>; // L1, 32K
0039 timebase-frequency = <82500000>;
0040 bus-frequency = <330000000>;
0041 clock-frequency = <825000000>;
0042 };
0043 };
0044
0045 memory {
0046 device_type = "memory";
0047 reg = <0x0 0x10000000>;
0048 };
0049
0050 soc8560@e0000000 {
0051 #address-cells = <1>;
0052 #size-cells = <1>;
0053 device_type = "soc";
0054 compatible = "simple-bus";
0055 ranges = <0x0 0xe0000000 0x100000>;
0056 bus-frequency = <330000000>;
0057
0058 ecm-law@0 {
0059 compatible = "fsl,ecm-law";
0060 reg = <0x0 0x1000>;
0061 fsl,num-laws = <8>;
0062 };
0063
0064 ecm@1000 {
0065 compatible = "fsl,mpc8560-ecm", "fsl,ecm";
0066 reg = <0x1000 0x1000>;
0067 interrupts = <17 2>;
0068 interrupt-parent = <&mpic>;
0069 };
0070
0071 memory-controller@2000 {
0072 compatible = "fsl,mpc8540-memory-controller";
0073 reg = <0x2000 0x1000>;
0074 interrupt-parent = <&mpic>;
0075 interrupts = <18 2>;
0076 };
0077
0078 L2: l2-cache-controller@20000 {
0079 compatible = "fsl,mpc8540-l2-cache-controller";
0080 reg = <0x20000 0x1000>;
0081 cache-line-size = <32>; // 32 bytes
0082 cache-size = <0x40000>; // L2, 256K
0083 interrupt-parent = <&mpic>;
0084 interrupts = <16 2>;
0085 };
0086
0087 dma@21300 {
0088 #address-cells = <1>;
0089 #size-cells = <1>;
0090 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
0091 reg = <0x21300 0x4>;
0092 ranges = <0x0 0x21100 0x200>;
0093 cell-index = <0>;
0094 dma-channel@0 {
0095 compatible = "fsl,mpc8560-dma-channel",
0096 "fsl,eloplus-dma-channel";
0097 reg = <0x0 0x80>;
0098 cell-index = <0>;
0099 interrupt-parent = <&mpic>;
0100 interrupts = <20 2>;
0101 };
0102 dma-channel@80 {
0103 compatible = "fsl,mpc8560-dma-channel",
0104 "fsl,eloplus-dma-channel";
0105 reg = <0x80 0x80>;
0106 cell-index = <1>;
0107 interrupt-parent = <&mpic>;
0108 interrupts = <21 2>;
0109 };
0110 dma-channel@100 {
0111 compatible = "fsl,mpc8560-dma-channel",
0112 "fsl,eloplus-dma-channel";
0113 reg = <0x100 0x80>;
0114 cell-index = <2>;
0115 interrupt-parent = <&mpic>;
0116 interrupts = <22 2>;
0117 };
0118 dma-channel@180 {
0119 compatible = "fsl,mpc8560-dma-channel",
0120 "fsl,eloplus-dma-channel";
0121 reg = <0x180 0x80>;
0122 cell-index = <3>;
0123 interrupt-parent = <&mpic>;
0124 interrupts = <23 2>;
0125 };
0126 };
0127
0128 enet0: ethernet@24000 {
0129 #address-cells = <1>;
0130 #size-cells = <1>;
0131 cell-index = <0>;
0132 device_type = "network";
0133 model = "TSEC";
0134 compatible = "gianfar";
0135 reg = <0x24000 0x1000>;
0136 ranges = <0x0 0x24000 0x1000>;
0137 local-mac-address = [ 00 00 00 00 00 00 ];
0138 interrupts = <29 2 30 2 34 2>;
0139 interrupt-parent = <&mpic>;
0140 tbi-handle = <&tbi0>;
0141 phy-handle = <&phy0>;
0142
0143 mdio@520 {
0144 #address-cells = <1>;
0145 #size-cells = <0>;
0146 compatible = "fsl,gianfar-mdio";
0147 reg = <0x520 0x20>;
0148
0149 phy0: ethernet-phy@0 {
0150 interrupt-parent = <&mpic>;
0151 interrupts = <5 1>;
0152 reg = <0x0>;
0153 };
0154 phy1: ethernet-phy@1 {
0155 interrupt-parent = <&mpic>;
0156 interrupts = <5 1>;
0157 reg = <0x1>;
0158 };
0159 phy2: ethernet-phy@2 {
0160 interrupt-parent = <&mpic>;
0161 interrupts = <7 1>;
0162 reg = <0x2>;
0163 };
0164 phy3: ethernet-phy@3 {
0165 interrupt-parent = <&mpic>;
0166 interrupts = <7 1>;
0167 reg = <0x3>;
0168 };
0169 tbi0: tbi-phy@11 {
0170 reg = <0x11>;
0171 device_type = "tbi-phy";
0172 };
0173 };
0174 };
0175
0176 enet1: ethernet@25000 {
0177 #address-cells = <1>;
0178 #size-cells = <1>;
0179 cell-index = <1>;
0180 device_type = "network";
0181 model = "TSEC";
0182 compatible = "gianfar";
0183 reg = <0x25000 0x1000>;
0184 ranges = <0x0 0x25000 0x1000>;
0185 local-mac-address = [ 00 00 00 00 00 00 ];
0186 interrupts = <35 2 36 2 40 2>;
0187 interrupt-parent = <&mpic>;
0188 tbi-handle = <&tbi1>;
0189 phy-handle = <&phy1>;
0190
0191 mdio@520 {
0192 #address-cells = <1>;
0193 #size-cells = <0>;
0194 compatible = "fsl,gianfar-tbi";
0195 reg = <0x520 0x20>;
0196
0197 tbi1: tbi-phy@11 {
0198 reg = <0x11>;
0199 device_type = "tbi-phy";
0200 };
0201 };
0202 };
0203
0204 mpic: pic@40000 {
0205 interrupt-controller;
0206 #address-cells = <0>;
0207 #interrupt-cells = <2>;
0208 reg = <0x40000 0x40000>;
0209 compatible = "chrp,open-pic";
0210 device_type = "open-pic";
0211 };
0212
0213 cpm@919c0 {
0214 #address-cells = <1>;
0215 #size-cells = <1>;
0216 compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
0217 reg = <0x919c0 0x30>;
0218 ranges;
0219
0220 muram@80000 {
0221 #address-cells = <1>;
0222 #size-cells = <1>;
0223 ranges = <0x0 0x80000 0x10000>;
0224
0225 data@0 {
0226 compatible = "fsl,cpm-muram-data";
0227 reg = <0x0 0x4000 0x9000 0x2000>;
0228 };
0229 };
0230
0231 brg@919f0 {
0232 compatible = "fsl,mpc8560-brg",
0233 "fsl,cpm2-brg",
0234 "fsl,cpm-brg";
0235 reg = <0x919f0 0x10 0x915f0 0x10>;
0236 clock-frequency = <165000000>;
0237 };
0238
0239 cpmpic: pic@90c00 {
0240 interrupt-controller;
0241 #address-cells = <0>;
0242 #interrupt-cells = <2>;
0243 interrupts = <46 2>;
0244 interrupt-parent = <&mpic>;
0245 reg = <0x90c00 0x80>;
0246 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
0247 };
0248
0249 serial0: serial@91a00 {
0250 device_type = "serial";
0251 compatible = "fsl,mpc8560-scc-uart",
0252 "fsl,cpm2-scc-uart";
0253 reg = <0x91a00 0x20 0x88000 0x100>;
0254 fsl,cpm-brg = <1>;
0255 fsl,cpm-command = <0x800000>;
0256 current-speed = <115200>;
0257 interrupts = <40 8>;
0258 interrupt-parent = <&cpmpic>;
0259 };
0260
0261 serial1: serial@91a20 {
0262 device_type = "serial";
0263 compatible = "fsl,mpc8560-scc-uart",
0264 "fsl,cpm2-scc-uart";
0265 reg = <0x91a20 0x20 0x88100 0x100>;
0266 fsl,cpm-brg = <2>;
0267 fsl,cpm-command = <0x4a00000>;
0268 current-speed = <115200>;
0269 interrupts = <41 8>;
0270 interrupt-parent = <&cpmpic>;
0271 };
0272
0273 enet2: ethernet@91320 {
0274 device_type = "network";
0275 compatible = "fsl,mpc8560-fcc-enet",
0276 "fsl,cpm2-fcc-enet";
0277 reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
0278 local-mac-address = [ 00 00 00 00 00 00 ];
0279 fsl,cpm-command = <0x16200300>;
0280 interrupts = <33 8>;
0281 interrupt-parent = <&cpmpic>;
0282 phy-handle = <&phy2>;
0283 };
0284
0285 enet3: ethernet@91340 {
0286 device_type = "network";
0287 compatible = "fsl,mpc8560-fcc-enet",
0288 "fsl,cpm2-fcc-enet";
0289 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
0290 local-mac-address = [ 00 00 00 00 00 00 ];
0291 fsl,cpm-command = <0x1a400300>;
0292 interrupts = <34 8>;
0293 interrupt-parent = <&cpmpic>;
0294 phy-handle = <&phy3>;
0295 };
0296 };
0297 };
0298
0299 pci0: pci@e0008000 {
0300 #interrupt-cells = <1>;
0301 #size-cells = <2>;
0302 #address-cells = <3>;
0303 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
0304 device_type = "pci";
0305 reg = <0xe0008000 0x1000>;
0306 clock-frequency = <66666666>;
0307 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
0308 interrupt-map = <
0309
0310 /* IDSEL 0x2 */
0311 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
0312 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
0313 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
0314 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
0315
0316 /* IDSEL 0x3 */
0317 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
0318 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
0319 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
0320 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
0321
0322 /* IDSEL 0x4 */
0323 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
0324 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1
0325 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1
0326 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1
0327
0328 /* IDSEL 0x5 */
0329 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1
0330 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1
0331 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1
0332 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1
0333
0334 /* IDSEL 12 */
0335 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
0336 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
0337 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
0338 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1
0339
0340 /* IDSEL 13 */
0341 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1
0342 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1
0343 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1
0344 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1
0345
0346 /* IDSEL 14*/
0347 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
0348 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1
0349 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1
0350 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1
0351
0352 /* IDSEL 15 */
0353 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1
0354 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1
0355 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1
0356 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1
0357
0358 /* IDSEL 18 */
0359 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1
0360 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1
0361 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1
0362 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1
0363
0364 /* IDSEL 19 */
0365 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1
0366 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1
0367 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1
0368 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1
0369
0370 /* IDSEL 20 */
0371 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1
0372 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1
0373 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1
0374 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1
0375
0376 /* IDSEL 21 */
0377 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1
0378 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1
0379 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1
0380 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>;
0381
0382 interrupt-parent = <&mpic>;
0383 interrupts = <24 2>;
0384 bus-range = <0 0>;
0385 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
0386 0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>;
0387 };
0388 };
