0001 /*
0002 * MPC8548 Silicon/SoC Device Tree Source (post include)
0003 *
0004 * Copyright 2011 Freescale Semiconductor Inc.
0005 *
0006 * Redistribution and use in source and binary forms, with or without
0007 * modification, are permitted provided that the following conditions are met:
0008 * * Redistributions of source code must retain the above copyright
0009 * notice, this list of conditions and the following disclaimer.
0010 * * Redistributions in binary form must reproduce the above copyright
0011 * notice, this list of conditions and the following disclaimer in the
0012 * documentation and/or other materials provided with the distribution.
0013 * * Neither the name of Freescale Semiconductor nor the
0014 * names of its contributors may be used to endorse or promote products
0015 * derived from this software without specific prior written permission.
0016 *
0017 *
0018 * ALTERNATIVELY, this software may be distributed under the terms of the
0019 * GNU General Public License ("GPL") as published by the Free Software
0020 * Foundation, either version 2 of that License or (at your option) any
0021 * later version.
0022 *
0023 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
0024 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
0025 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
0026 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
0027 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
0028 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
0029 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
0030 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
0031 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
0032 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
0033 */
0034
0035 &lbc {
0036 #address-cells = <2>;
0037 #size-cells = <1>;
0038 compatible = "fsl,mpc8548-lbc", "fsl,pq3-localbus", "simple-bus";
0039 interrupts = <19 2 0 0>;
0040 };
0041
0042 /* controller at 0x8000 */
0043 &pci0 {
0044 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
0045 device_type = "pci";
0046 interrupts = <24 0x2 0 0>;
0047 bus-range = <0 0xff>;
0048 #interrupt-cells = <1>;
0049 #size-cells = <2>;
0050 #address-cells = <3>;
0051 };
0052
0053 /* controller at 0x9000 */
0054 &pci1 {
0055 compatible = "fsl,mpc8540-pci";
0056 device_type = "pci";
0057 interrupts = <25 0x2 0 0>;
0058 bus-range = <0 0xff>;
0059 #interrupt-cells = <1>;
0060 #size-cells = <2>;
0061 #address-cells = <3>;
0062 };
0063
0064 /* controller at 0xa000 */
0065 &pci2 {
0066 compatible = "fsl,mpc8548-pcie";
0067 device_type = "pci";
0068 #size-cells = <2>;
0069 #address-cells = <3>;
0070 bus-range = <0 255>;
0071 clock-frequency = <33333333>;
0072 interrupts = <26 2 0 0>;
0073
0074 pcie@0 {
0075 reg = <0 0 0 0 0>;
0076 #interrupt-cells = <1>;
0077 #size-cells = <2>;
0078 #address-cells = <3>;
0079 device_type = "pci";
0080 interrupts = <26 2 0 0>;
0081 interrupt-map-mask = <0xf800 0 0 7>;
0082 interrupt-map = <
0083 /* IDSEL 0x0 */
0084 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
0085 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
0086 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
0087 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
0088 >;
0089 };
0090 };
0091
0092 &rio {
0093 compatible = "fsl,srio";
0094 interrupts = <48 2 0 0>;
0095 #address-cells = <2>;
0096 #size-cells = <2>;
0097 fsl,srio-rmu-handle = <&rmu>;
0098 ranges;
0099
0100 port1 {
0101 #address-cells = <2>;
0102 #size-cells = <2>;
0103 cell-index = <1>;
0104 };
0105 };
0106
0107 &soc {
0108 #address-cells = <1>;
0109 #size-cells = <1>;
0110 device_type = "soc";
0111 compatible = "fsl,mpc8548-immr", "simple-bus";
0112 bus-frequency = <0>; // Filled out by uboot.
0113
0114 ecm-law@0 {
0115 compatible = "fsl,ecm-law";
0116 reg = <0x0 0x1000>;
0117 fsl,num-laws = <10>;
0118 };
0119
0120 ecm@1000 {
0121 compatible = "fsl,mpc8548-ecm", "fsl,ecm";
0122 reg = <0x1000 0x1000>;
0123 interrupts = <17 2 0 0>;
0124 };
0125
0126 memory-controller@2000 {
0127 compatible = "fsl,mpc8548-memory-controller";
0128 reg = <0x2000 0x1000>;
0129 interrupts = <18 2 0 0>;
0130 };
0131
0132 /include/ "pq3-i2c-0.dtsi"
0133 /include/ "pq3-i2c-1.dtsi"
0134 /include/ "pq3-duart-0.dtsi"
0135
0136 L2: l2-cache-controller@20000 {
0137 compatible = "fsl,mpc8548-l2-cache-controller";
0138 reg = <0x20000 0x1000>;
0139 cache-line-size = <32>; // 32 bytes
0140 cache-size = <0x80000>; // L2, 512K
0141 interrupts = <16 2 0 0>;
0142 };
0143
0144 /include/ "pq3-dma-0.dtsi"
0145 /include/ "pq3-etsec1-0.dtsi"
0146 /include/ "pq3-etsec1-1.dtsi"
0147 /include/ "pq3-etsec1-2.dtsi"
0148 /include/ "pq3-etsec1-3.dtsi"
0149
0150 /include/ "pq3-sec2.1-0.dtsi"
0151 /include/ "pq3-mpic.dtsi"
0152 /include/ "pq3-rmu-0.dtsi"
0153
0154 global-utilities@e0000 {
0155 compatible = "fsl,mpc8548-guts";
0156 reg = <0xe0000 0x1000>;
0157 fsl,has-rstcr;
0158 };
0159 };
