0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * Keymile kmcent2 Device Tree Source, based on T1040RDB DTS
0004 *
0005 * (C) Copyright 2016
0006 * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
0007 *
0008 * Copyright 2014 - 2015 Freescale Semiconductor Inc.
0009 */
0010
0011 /include/ "t104xsi-pre.dtsi"
0012
0013 / {
0014 model = "keymile,kmcent2";
0015 compatible = "keymile,kmcent2";
0016
0017 aliases {
0018 front_phy = &front_phy;
0019 };
0020
0021 reserved-memory {
0022 #address-cells = <2>;
0023 #size-cells = <2>;
0024 ranges;
0025
0026 bman_fbpr: bman-fbpr {
0027 size = <0 0x1000000>;
0028 alignment = <0 0x1000000>;
0029 };
0030 qman_fqd: qman-fqd {
0031 size = <0 0x400000>;
0032 alignment = <0 0x400000>;
0033 };
0034 qman_pfdr: qman-pfdr {
0035 size = <0 0x2000000>;
0036 alignment = <0 0x2000000>;
0037 };
0038 };
0039
0040 ifc: localbus@ffe124000 {
0041 reg = <0xf 0xfe124000 0 0x2000>;
0042 ranges = <0 0 0xf 0xe8000000 0x04000000
0043 1 0 0xf 0xfa000000 0x00010000
0044 2 0 0xf 0xfb000000 0x00010000
0045 4 0 0xf 0xc0000000 0x08000000
0046 6 0 0xf 0xd0000000 0x08000000
0047 7 0 0xf 0xd8000000 0x08000000>;
0048
0049 nor@0,0 {
0050 #address-cells = <1>;
0051 #size-cells = <1>;
0052 compatible = "cfi-flash";
0053 reg = <0x0 0x0 0x04000000>;
0054 bank-width = <2>;
0055 device-width = <2>;
0056 };
0057
0058 nand@1,0 {
0059 #address-cells = <1>;
0060 #size-cells = <1>;
0061 compatible = "fsl,ifc-nand";
0062 reg = <0x1 0x0 0x10000>;
0063 };
0064
0065 board-control@2,0 {
0066 compatible = "keymile,qriox";
0067 reg = <0x2 0x0 0x80>;
0068 };
0069
0070 chassis-mgmt@6,0 {
0071 compatible = "keymile,bfticu";
0072 reg = <6 0 0x100>;
0073 interrupt-controller;
0074 interrupt-parent = <&mpic>;
0075 interrupts = <11 1 0 0>;
0076 #interrupt-cells = <1>;
0077 };
0078
0079 };
0080
0081 memory {
0082 device_type = "memory";
0083 };
0084
0085 dcsr: dcsr@f00000000 {
0086 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
0087 };
0088
0089 bportals: bman-portals@ff4000000 {
0090 ranges = <0x0 0xf 0xf4000000 0x2000000>;
0091 };
0092
0093 qportals: qman-portals@ff6000000 {
0094 ranges = <0x0 0xf 0xf6000000 0x2000000>;
0095 };
0096
0097 soc: soc@ffe000000 {
0098 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
0099 reg = <0xf 0xfe000000 0 0x00001000>;
0100
0101 spi@110000 {
0102 network-clock@1 {
0103 compatible = "zarlink,zl30364";
0104 reg = <1>;
0105 spi-max-frequency = <1000000>;
0106 };
0107 };
0108
0109 sdhc@114000 {
0110 status = "disabled";
0111 };
0112
0113 i2c@118000 {
0114 clock-frequency = <100000>;
0115
0116 mux@70 {
0117 compatible = "nxp,pca9547";
0118 reg = <0x70>;
0119 #address-cells = <1>;
0120 #size-cells = <0>;
0121 i2c-mux-idle-disconnect;
0122
0123 i2c@0 {
0124 reg = <0>;
0125 #address-cells = <1>;
0126 #size-cells = <0>;
0127
0128 eeprom@54 {
0129 compatible = "atmel,24c02";
0130 reg = <0x54>;
0131 pagesize = <2>;
0132 read-only;
0133 label = "ddr3-spd";
0134 };
0135 };
0136
0137 i2c@7 {
0138 reg = <7>;
0139 #address-cells = <1>;
0140 #size-cells = <0>;
0141
0142 temp-sensor@48 {
0143 compatible = "national,lm75";
0144 reg = <0x48>;
0145 label = "SENSOR_0";
0146 };
0147 temp-sensor@4a {
0148 compatible = "national,lm75";
0149 reg = <0x4a>;
0150 label = "SENSOR_2";
0151 };
0152 temp-sensor@4b {
0153 compatible = "national,lm75";
0154 reg = <0x4b>;
0155 label = "SENSOR_3";
0156 };
0157 };
0158 };
0159 };
0160
0161 i2c@118100 {
0162 clock-frequency = <100000>;
0163
0164 eeprom@50 {
0165 compatible = "atmel,24c08";
0166 reg = <0x50>;
0167 pagesize = <16>;
0168 };
0169
0170 eeprom@54 {
0171 compatible = "atmel,24c08";
0172 reg = <0x54>;
0173 pagesize = <16>;
0174 };
0175 };
0176
0177 i2c@119000 {
0178 status = "disabled";
0179 };
0180
0181 i2c@119100 {
0182 status = "disabled";
0183 };
0184
0185 serial2: serial@11d500 {
0186 status = "disabled";
0187 };
0188
0189 serial3: serial@11d600 {
0190 status = "disabled";
0191 };
0192
0193 usb0: usb@210000 {
0194 status = "disabled";
0195 };
0196 usb1: usb@211000 {
0197 status = "disabled";
0198 };
0199
0200 display@180000 {
0201 status = "disabled";
0202 };
0203
0204 sata@220000 {
0205 status = "disabled";
0206 };
0207 sata@221000 {
0208 status = "disabled";
0209 };
0210
0211 fman@400000 {
0212 ethernet@e0000 {
0213 phy-mode = "sgmii";
0214 fixed-link {
0215 speed = <1000>;
0216 full-duplex;
0217 };
0218 };
0219
0220 ethernet@e2000 {
0221 phy-mode = "sgmii";
0222 fixed-link {
0223 speed = <1000>;
0224 full-duplex;
0225 };
0226 };
0227
0228 ethernet@e4000 {
0229 status = "disabled";
0230 };
0231
0232 ethernet@e6000 {
0233 status = "disabled";
0234 };
0235
0236 ethernet@e8000 {
0237 phy-handle = <&front_phy>;
0238 phy-mode = "rgmii-id";
0239 };
0240
0241 mdio0: mdio@fc000 {
0242 front_phy: ethernet-phy@11 {
0243 reg = <0x11>;
0244 };
0245 };
0246 };
0247 };
0248
0249
0250 pci0: pcie@ffe240000 {
0251 reg = <0xf 0xfe240000 0 0x10000>;
0252 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
0253 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
0254 pcie@0 {
0255 ranges = <0x02000000 0 0xe0000000
0256 0x02000000 0 0xe0000000
0257 0 0x20000000
0258
0259 0x01000000 0 0x00000000
0260 0x01000000 0 0x00000000
0261 0 0x00010000>;
0262 };
0263 };
0264
0265 pci1: pcie@ffe250000 {
0266 status = "disabled";
0267 reg = <0xf 0xfe250000 0 0x10000>;
0268 ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000
0269 0x01000000 0 0 0xf 0xf8010000 0 0x00010000>;
0270 pcie@0 {
0271 ranges = <0x02000000 0 0xe0000000
0272 0x02000000 0 0xe0000000
0273 0 0x10000000
0274
0275 0x01000000 0 0x00000000
0276 0x01000000 0 0x00000000
0277 0 0x00010000>;
0278 };
0279 };
0280
0281 pci2: pcie@ffe260000 {
0282 status = "disabled";
0283 reg = <0xf 0xfe260000 0 0x10000>;
0284 ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
0285 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
0286 pcie@0 {
0287 ranges = <0x02000000 0 0xe0000000
0288 0x02000000 0 0xe0000000
0289 0 0x10000000
0290
0291 0x01000000 0 0x00000000
0292 0x01000000 0 0x00000000
0293 0 0x00010000>;
0294 };
0295 };
0296
0297 pci3: pcie@ffe270000 {
0298 status = "disabled";
0299 reg = <0xf 0xfe270000 0 0x10000>;
0300 ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000
0301 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
0302 pcie@0 {
0303 ranges = <0x02000000 0 0xe0000000
0304 0x02000000 0 0xe0000000
0305 0 0x10000000
0306
0307 0x01000000 0 0x00000000
0308 0x01000000 0 0x00000000
0309 0 0x00010000>;
0310 };
0311 };
0312
0313 qe: qe@ffe140000 {
0314 ranges = <0x0 0xf 0xfe140000 0x40000>;
0315 reg = <0xf 0xfe140000 0 0x480>;
0316 brg-frequency = <0>;
0317 bus-frequency = <0>;
0318
0319 si1: si@700 {
0320 compatible = "fsl,t1040-qe-si";
0321 reg = <0x700 0x80>;
0322 };
0323
0324 siram1: siram@1000 {
0325 compatible = "fsl,t1040-qe-siram";
0326 reg = <0x1000 0x800>;
0327 };
0328
0329 ucc_hdlc: ucc@2000 {
0330 device_type = "hdlc";
0331 compatible = "fsl,ucc-hdlc";
0332 rx-clock-name = "clk9";
0333 tx-clock-name = "clk9";
0334 fsl,hdlc-bus;
0335 };
0336 };
0337 };
0338
0339 #include "t1040si-post.dtsi"
