0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * GE SBC310 Device Tree Source
0004 *
0005 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
0006 *
0007 * Based on: SBS CM6 Device Tree Source
0008 * Copyright 2007 SBS Technologies GmbH & Co. KG
0009 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
0010 * Copyright 2006 Freescale Semiconductor Inc.
0011 */
0012
0013 /*
0014 * Compiled with dtc -I dts -O dtb -o gef_sbc310.dtb gef_sbc310.dts
0015 */
0016
0017 /include/ "mpc8641si-pre.dtsi"
0018
0019 / {
0020 model = "GEF_SBC310";
0021 compatible = "gef,sbc310";
0022
0023 memory {
0024 device_type = "memory";
0025 reg = <0x0 0x40000000>; // set by uboot
0026 };
0027
0028 lbc: localbus@fef05000 {
0029 reg = <0xfef05000 0x1000>;
0030
0031 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
0032 1 0 0xe0000000 0x08000000 // Paged Flash 0
0033 2 0 0xe8000000 0x08000000 // Paged Flash 1
0034 3 0 0xfc100000 0x00020000 // NVRAM
0035 4 0 0xfc000000 0x00010000>; // FPGA
0036
0037 /* flash@0,0 is a mirror of part of the memory in flash@1,0
0038 flash@0,0 {
0039 compatible = "gef,sbc310-firmware-mirror", "cfi-flash";
0040 reg = <0x0 0x0 0x01000000>;
0041 bank-width = <2>;
0042 device-width = <2>;
0043 #address-cells = <1>;
0044 #size-cells = <1>;
0045 partition@0 {
0046 label = "firmware";
0047 reg = <0x0 0x01000000>;
0048 read-only;
0049 };
0050 };
0051 */
0052
0053 flash@1,0 {
0054 compatible = "gef,sbc310-paged-flash", "cfi-flash";
0055 reg = <0x1 0x0 0x8000000>;
0056 bank-width = <2>;
0057 device-width = <2>;
0058 #address-cells = <1>;
0059 #size-cells = <1>;
0060 partition@0 {
0061 label = "user";
0062 reg = <0x0 0x7800000>;
0063 };
0064 partition@7800000 {
0065 label = "firmware";
0066 reg = <0x7800000 0x800000>;
0067 read-only;
0068 };
0069 };
0070
0071 nvram@3,0 {
0072 device_type = "nvram";
0073 compatible = "simtek,stk14ca8";
0074 reg = <0x3 0x0 0x20000>;
0075 };
0076
0077 fpga@4,0 {
0078 compatible = "gef,fpga-regs";
0079 reg = <0x4 0x0 0x40>;
0080 };
0081
0082 wdt@4,2000 {
0083 compatible = "gef,sbc310-fpga-wdt", "gef,fpga-wdt-1.00",
0084 "gef,fpga-wdt";
0085 reg = <0x4 0x2000 0x8>;
0086 interrupts = <0x1a 0x4>;
0087 interrupt-parent = <&gef_pic>;
0088 };
0089 /*
0090 wdt@4,2010 {
0091 compatible = "gef,sbc310-fpga-wdt", "gef,fpga-wdt-1.00",
0092 "gef,fpga-wdt";
0093 reg = <0x4 0x2010 0x8>;
0094 interrupts = <0x1b 0x4>;
0095 interrupt-parent = <&gef_pic>;
0096 };
0097 */
0098 gef_pic: pic@4,4000 {
0099 #interrupt-cells = <1>;
0100 interrupt-controller;
0101 compatible = "gef,sbc310-fpga-pic", "gef,fpga-pic";
0102 reg = <0x4 0x4000 0x20>;
0103 interrupts = <0x8 0x9 0 0>;
0104
0105 };
0106 gef_gpio: gpio@4,8000 {
0107 #gpio-cells = <2>;
0108 compatible = "gef,sbc310-gpio";
0109 reg = <0x4 0x8000 0x24>;
0110 gpio-controller;
0111 };
0112 };
0113
0114 soc: soc@fef00000 {
0115 ranges = <0x0 0xfef00000 0x00100000>;
0116
0117 i2c@3000 {
0118 rtc@51 {
0119 compatible = "epson,rx8581";
0120 reg = <0x00000051>;
0121 };
0122 };
0123
0124 i2c@3100 {
0125 hwmon@48 {
0126 compatible = "national,lm92";
0127 reg = <0x48>;
0128 };
0129
0130 hwmon@4c {
0131 compatible = "adi,adt7461";
0132 reg = <0x4c>;
0133 };
0134
0135 eti@6b {
0136 compatible = "dallas,ds1682";
0137 reg = <0x6b>;
0138 };
0139 };
0140
0141 enet0: ethernet@24000 {
0142 tbi-handle = <&tbi0>;
0143 phy-handle = <&phy0>;
0144 phy-connection-type = "gmii";
0145 };
0146
0147 mdio@24520 {
0148 phy0: ethernet-phy@0 {
0149 interrupt-parent = <&gef_pic>;
0150 interrupts = <0x9 0x4>;
0151 reg = <1>;
0152 };
0153 phy2: ethernet-phy@2 {
0154 interrupt-parent = <&gef_pic>;
0155 interrupts = <0x8 0x4>;
0156 reg = <3>;
0157 };
0158 tbi0: tbi-phy@11 {
0159 reg = <0x11>;
0160 device_type = "tbi-phy";
0161 };
0162 };
0163
0164 enet1: ethernet@26000 {
0165 tbi-handle = <&tbi2>;
0166 phy-handle = <&phy2>;
0167 phy-connection-type = "gmii";
0168 };
0169
0170 mdio@26520 {
0171 tbi2: tbi-phy@11 {
0172 reg = <0x11>;
0173 device_type = "tbi-phy";
0174 };
0175 };
0176
0177 enet2: ethernet@25000 {
0178 status = "disabled";
0179 };
0180
0181 mdio@25520 {
0182 status = "disabled";
0183 };
0184
0185 enet3: ethernet@27000 {
0186 status = "disabled";
0187 };
0188
0189 mdio@27520 {
0190 status = "disabled";
0191 };
0192 };
0193
0194 pci0: pcie@fef08000 {
0195 reg = <0xfef08000 0x1000>;
0196 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
0197 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
0198 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
0199 interrupt-map = <
0200 0x0000 0x0 0x0 0x1 &mpic 0x0 0x2
0201 0x0000 0x0 0x0 0x2 &mpic 0x1 0x2
0202 0x0000 0x0 0x0 0x3 &mpic 0x2 0x2
0203 0x0000 0x0 0x0 0x4 &mpic 0x3 0x2
0204 >;
0205
0206 pcie@0 {
0207 ranges = <0x02000000 0x0 0x80000000
0208 0x02000000 0x0 0x80000000
0209 0x0 0x40000000
0210
0211 0x01000000 0x0 0x00000000
0212 0x01000000 0x0 0x00000000
0213 0x0 0x00400000>;
0214 };
0215 };
0216
0217 pci1: pcie@fef09000 {
0218 reg = <0xfef09000 0x1000>;
0219 ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
0220 0x01000000 0x0 0x00000000 0xfe400000 0x0 0x00400000>;
0221
0222 pcie@0 {
0223 ranges = <0x02000000 0x0 0xc0000000
0224 0x02000000 0x0 0xc0000000
0225 0x0 0x20000000
0226
0227 0x01000000 0x0 0x00000000
0228 0x01000000 0x0 0x00000000
0229 0x0 0x00400000>;
0230 };
0231 };
0232 };
0233
0234 /include/ "mpc8641si-post.dtsi"
