0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * GE PPC9A Device Tree Source
0004 *
0005 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
0006 *
0007 * Based on: SBS CM6 Device Tree Source
0008 * Copyright 2007 SBS Technologies GmbH & Co. KG
0009 * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source)
0010 * Copyright 2006 Freescale Semiconductor Inc.
0011 */
0012
0013 /*
0014 * Compiled with dtc -I dts -O dtb -o gef_ppc9a.dtb gef_ppc9a.dts
0015 */
0016
0017 /include/ "mpc8641si-pre.dtsi"
0018
0019 / {
0020 model = "GEF_PPC9A";
0021 compatible = "gef,ppc9a";
0022
0023 memory {
0024 device_type = "memory";
0025 reg = <0x0 0x40000000>; // set by uboot
0026 };
0027
0028 lbc: localbus@fef05000 {
0029 reg = <0xfef05000 0x1000>;
0030
0031 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
0032 1 0 0xe8000000 0x08000000 // Paged Flash 0
0033 2 0 0xe0000000 0x08000000 // Paged Flash 1
0034 3 0 0xfc100000 0x00020000 // NVRAM
0035 4 0 0xfc000000 0x00008000 // FPGA
0036 5 0 0xfc008000 0x00008000 // AFIX FPGA
0037 6 0 0xfd000000 0x00800000 // IO FPGA (8-bit)
0038 7 0 0xfd800000 0x00800000>; // IO FPGA (32-bit)
0039
0040 /* flash@0,0 is a mirror of part of the memory in flash@1,0
0041 flash@0,0 {
0042 compatible = "gef,ppc9a-firmware-mirror", "cfi-flash";
0043 reg = <0x0 0x0 0x1000000>;
0044 bank-width = <4>;
0045 device-width = <2>;
0046 #address-cells = <1>;
0047 #size-cells = <1>;
0048 partition@0 {
0049 label = "firmware";
0050 reg = <0x0 0x1000000>;
0051 read-only;
0052 };
0053 };
0054 */
0055
0056 flash@1,0 {
0057 compatible = "gef,ppc9a-paged-flash", "cfi-flash";
0058 reg = <0x1 0x0 0x8000000>;
0059 bank-width = <4>;
0060 device-width = <2>;
0061 #address-cells = <1>;
0062 #size-cells = <1>;
0063 partition@0 {
0064 label = "user";
0065 reg = <0x0 0x7800000>;
0066 };
0067 partition@7800000 {
0068 label = "firmware";
0069 reg = <0x7800000 0x800000>;
0070 read-only;
0071 };
0072 };
0073
0074 nvram@3,0 {
0075 device_type = "nvram";
0076 compatible = "simtek,stk14ca8";
0077 reg = <0x3 0x0 0x20000>;
0078 };
0079
0080 fpga@4,0 {
0081 compatible = "gef,ppc9a-fpga-regs";
0082 reg = <0x4 0x0 0x40>;
0083 };
0084
0085 wdt@4,2000 {
0086 compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00",
0087 "gef,fpga-wdt";
0088 reg = <0x4 0x2000 0x8>;
0089 interrupts = <0x1a 0x4>;
0090 interrupt-parent = <&gef_pic>;
0091 };
0092 /* Second watchdog available, driver currently supports one.
0093 wdt@4,2010 {
0094 compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00",
0095 "gef,fpga-wdt";
0096 reg = <0x4 0x2010 0x8>;
0097 interrupts = <0x1b 0x4>;
0098 interrupt-parent = <&gef_pic>;
0099 };
0100 */
0101 gef_pic: pic@4,4000 {
0102 #interrupt-cells = <1>;
0103 interrupt-controller;
0104 compatible = "gef,ppc9a-fpga-pic", "gef,fpga-pic-1.00";
0105 reg = <0x4 0x4000 0x20>;
0106 interrupts = <0x8 0x9 0 0>;
0107
0108 };
0109 gef_gpio: gpio@7,14000 {
0110 #gpio-cells = <2>;
0111 compatible = "gef,ppc9a-gpio", "gef,sbc610-gpio";
0112 reg = <0x7 0x14000 0x24>;
0113 gpio-controller;
0114 };
0115 };
0116
0117 soc: soc@fef00000 {
0118 ranges = <0x0 0xfef00000 0x00100000>;
0119
0120 i2c@3000 {
0121 hwmon@48 {
0122 compatible = "national,lm92";
0123 reg = <0x48>;
0124 };
0125
0126 hwmon@4c {
0127 compatible = "adi,adt7461";
0128 reg = <0x4c>;
0129 };
0130
0131 rtc@51 {
0132 compatible = "epson,rx8581";
0133 reg = <0x00000051>;
0134 };
0135
0136 eti@6b {
0137 compatible = "dallas,ds1682";
0138 reg = <0x6b>;
0139 };
0140 };
0141
0142 enet0: ethernet@24000 {
0143 tbi-handle = <&tbi0>;
0144 phy-handle = <&phy0>;
0145 phy-connection-type = "gmii";
0146 };
0147
0148 mdio@24520 {
0149 phy0: ethernet-phy@0 {
0150 interrupt-parent = <&gef_pic>;
0151 interrupts = <0x9 0x4>;
0152 reg = <1>;
0153 };
0154 phy2: ethernet-phy@2 {
0155 interrupt-parent = <&gef_pic>;
0156 interrupts = <0x8 0x4>;
0157 reg = <3>;
0158 };
0159 tbi0: tbi-phy@11 {
0160 reg = <0x11>;
0161 device_type = "tbi-phy";
0162 };
0163 };
0164
0165 enet1: ethernet@26000 {
0166 tbi-handle = <&tbi2>;
0167 phy-handle = <&phy2>;
0168 phy-connection-type = "gmii";
0169 };
0170
0171 mdio@26520 {
0172 tbi2: tbi-phy@11 {
0173 reg = <0x11>;
0174 device_type = "tbi-phy";
0175 };
0176 };
0177
0178 enet2: ethernet@25000 {
0179 status = "disabled";
0180 };
0181
0182 mdio@25520 {
0183 status = "disabled";
0184 };
0185
0186 enet3: ethernet@27000 {
0187 status = "disabled";
0188 };
0189
0190 mdio@27520 {
0191 status = "disabled";
0192 };
0193 };
0194
0195 pci0: pcie@fef08000 {
0196 reg = <0xfef08000 0x1000>;
0197 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000
0198 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>;
0199
0200 pcie@0 {
0201 ranges = <0x02000000 0x0 0x80000000
0202 0x02000000 0x0 0x80000000
0203 0x0 0x40000000
0204
0205 0x01000000 0x0 0x00000000
0206 0x01000000 0x0 0x00000000
0207 0x0 0x00400000>;
0208 };
0209 };
0210
0211 pci1: pcie@fef09000 {
0212 status = "disabled";
0213 };
0214 };
0215
0216 /include/ "mpc8641si-post.dtsi"
