0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003 * GE IMP3A Device Tree Source
0004 *
0005 * Copyright 2010-2011 GE Intelligent Platforms Embedded Systems, Inc.
0006 *
0007 * Based on: P2020 DS Device Tree Source
0008 * Copyright 2009 Freescale Semiconductor Inc.
0009 */
0010
0011 /include/ "p2020si-pre.dtsi"
0012
0013 / {
0014 model = "GE_IMP3A";
0015 compatible = "ge,imp3a";
0016
0017 memory {
0018 device_type = "memory";
0019 };
0020
0021 lbc: localbus@fef05000 {
0022 reg = <0 0xfef05000 0 0x1000>;
0023
0024 ranges = <0x0 0x0 0x0 0xff000000 0x01000000
0025 0x1 0x0 0x0 0xe0000000 0x08000000
0026 0x2 0x0 0x0 0xe8000000 0x08000000
0027 0x3 0x0 0x0 0xfc100000 0x00020000
0028 0x4 0x0 0x0 0xfc000000 0x00008000
0029 0x5 0x0 0x0 0xfc008000 0x00008000
0030 0x6 0x0 0x0 0xfee00000 0x00040000
0031 0x7 0x0 0x0 0xfee80000 0x00040000>;
0032
0033 /* nor@0,0 is a mirror of part of the memory in nor@1,0
0034 nor@0,0 {
0035 #address-cells = <1>;
0036 #size-cells = <1>;
0037 compatible = "ge,imp3a-firmware-mirror", "cfi-flash";
0038 reg = <0x0 0x0 0x1000000>;
0039 bank-width = <2>;
0040 device-width = <1>;
0041
0042 partition@0 {
0043 label = "firmware";
0044 reg = <0x0 0x1000000>;
0045 read-only;
0046 };
0047 };
0048 */
0049
0050 nor@1,0 {
0051 #address-cells = <1>;
0052 #size-cells = <1>;
0053 compatible = "ge,imp3a-paged-flash", "cfi-flash";
0054 reg = <0x1 0x0 0x8000000>;
0055 bank-width = <2>;
0056 device-width = <1>;
0057
0058 partition@0 {
0059 label = "user";
0060 reg = <0x0 0x7800000>;
0061 };
0062
0063 partition@7800000 {
0064 label = "firmware";
0065 reg = <0x7800000 0x800000>;
0066 read-only;
0067 };
0068 };
0069
0070 nvram@3,0 {
0071 device_type = "nvram";
0072 compatible = "simtek,stk14ca8";
0073 reg = <0x3 0x0 0x20000>;
0074 };
0075
0076 fpga@4,0 {
0077 compatible = "ge,imp3a-fpga-regs";
0078 reg = <0x4 0x0 0x20>;
0079 };
0080
0081 gef_pic: pic@4,20 {
0082 #interrupt-cells = <1>;
0083 interrupt-controller;
0084 device_type = "interrupt-controller";
0085 compatible = "ge,imp3a-fpga-pic", "gef,fpga-pic-1.00";
0086 reg = <0x4 0x20 0x20>;
0087 interrupts = <6 7 0 0>;
0088 };
0089
0090 gef_gpio: gpio@4,400 {
0091 #gpio-cells = <2>;
0092 compatible = "ge,imp3a-gpio";
0093 reg = <0x4 0x400 0x24>;
0094 gpio-controller;
0095 };
0096
0097 wdt@4,800 {
0098 compatible = "ge,imp3a-fpga-wdt", "gef,fpga-wdt-1.00",
0099 "gef,fpga-wdt";
0100 reg = <0x4 0x800 0x8>;
0101 interrupts = <10 4>;
0102 interrupt-parent = <&gef_pic>;
0103 };
0104
0105 /* Second watchdog available, driver currently supports one.
0106 wdt@4,808 {
0107 compatible = "gef,imp3a-fpga-wdt", "gef,fpga-wdt-1.00",
0108 "gef,fpga-wdt";
0109 reg = <0x4 0x808 0x8>;
0110 interrupts = <9 4>;
0111 interrupt-parent = <&gef_pic>;
0112 };
0113 */
0114
0115 nand@6,0 {
0116 compatible = "fsl,elbc-fcm-nand";
0117 reg = <0x6 0x0 0x40000>;
0118 };
0119
0120 nand@7,0 {
0121 compatible = "fsl,elbc-fcm-nand";
0122 reg = <0x7 0x0 0x40000>;
0123 };
0124 };
0125
0126 soc: soc@fef00000 {
0127 ranges = <0x0 0 0xfef00000 0x100000>;
0128
0129 i2c@3000 {
0130 hwmon@48 {
0131 compatible = "national,lm92";
0132 reg = <0x48>;
0133 };
0134
0135 hwmon@4c {
0136 compatible = "adi,adt7461";
0137 reg = <0x4c>;
0138 };
0139
0140 rtc@51 {
0141 compatible = "epson,rx8581";
0142 reg = <0x51>;
0143 };
0144
0145 eti@6b {
0146 compatible = "dallas,ds1682";
0147 reg = <0x6b>;
0148 };
0149 };
0150
0151 usb@22000 {
0152 phy_type = "ulpi";
0153 dr_mode = "host";
0154 };
0155
0156 mdio@24520 {
0157 phy0: ethernet-phy@0 {
0158 interrupt-parent = <&gef_pic>;
0159 interrupts = <0xc 0x4>;
0160 reg = <0x1>;
0161 };
0162 phy1: ethernet-phy@1 {
0163 interrupt-parent = <&gef_pic>;
0164 interrupts = <0xb 0x4>;
0165 reg = <0x2>;
0166 };
0167 tbi0: tbi-phy@11 {
0168 reg = <0x11>;
0169 device_type = "tbi-phy";
0170 };
0171 };
0172
0173 mdio@25520 {
0174 tbi1: tbi-phy@11 {
0175 reg = <0x11>;
0176 device_type = "tbi-phy";
0177 };
0178 };
0179
0180 mdio@26520 {
0181 status = "disabled";
0182 };
0183
0184 enet0: ethernet@24000 {
0185 tbi-handle = <&tbi0>;
0186 phy-handle = <&phy0>;
0187 phy-connection-type = "gmii";
0188 };
0189
0190 enet1: ethernet@25000 {
0191 tbi-handle = <&tbi1>;
0192 phy-handle = <&phy1>;
0193 phy-connection-type = "gmii";
0194 };
0195
0196 enet2: ethernet@26000 {
0197 status = "disabled";
0198 };
0199 };
0200
0201 pci0: pcie@fef08000 {
0202 ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
0203 0x1000000 0x0 0x00000000 0 0xfe020000 0x0 0x10000>;
0204 reg = <0 0xfef08000 0 0x1000>;
0205
0206 pcie@0 {
0207 ranges = <0x2000000 0x0 0xc0000000
0208 0x2000000 0x0 0xc0000000
0209 0x0 0x20000000
0210
0211 0x1000000 0x0 0x0
0212 0x1000000 0x0 0x0
0213 0x0 0x10000>;
0214 };
0215 };
0216
0217 pci1: pcie@fef09000 {
0218 reg = <0 0xfef09000 0 0x1000>;
0219 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
0220 0x1000000 0x0 0x00000000 0 0xfe010000 0x0 0x10000>;
0221
0222 pcie@0 {
0223 ranges = <0x2000000 0x0 0xa0000000
0224 0x2000000 0x0 0xa0000000
0225 0x0 0x20000000
0226
0227 0x1000000 0x0 0x0
0228 0x1000000 0x0 0x0
0229 0x0 0x10000>;
0230 };
0231
0232 };
0233
0234 pci2: pcie@fef0a000 {
0235 reg = <0 0xfef0a000 0 0x1000>;
0236 ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
0237 0x1000000 0x0 0x00000000 0 0xfe000000 0x0 0x10000>;
0238
0239 pcie@0 {
0240 ranges = <0x2000000 0x0 0x80000000
0241 0x2000000 0x0 0x80000000
0242 0x0 0x20000000
0243
0244 0x1000000 0x0 0x0
0245 0x1000000 0x0 0x0
0246 0x0 0x10000>;
0247 };
0248 };
0249 };
0250
0251 /include/ "p2020si-post.dtsi"
